Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl...
[oota-llvm.git] / lib / Target / Alpha / AlphaRegisterInfo.h
1 //===- AlphaRegisterInfo.h - Alpha Register Information Impl ----*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Alpha implementation of the MRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef ALPHAREGISTERINFO_H
15 #define ALPHAREGISTERINFO_H
16
17 #include "llvm/Target/MRegisterInfo.h"
18 #include "AlphaGenRegisterInfo.h.inc"
19
20 namespace llvm {
21
22 class TargetInstrInfo;
23 class Type;
24
25 struct AlphaRegisterInfo : public AlphaGenRegisterInfo {
26   const TargetInstrInfo &TII;
27
28   AlphaRegisterInfo(const TargetInstrInfo &tii);
29
30   /// Code Generation virtual methods...
31   void storeRegToStackSlot(MachineBasicBlock &MBB,
32                            MachineBasicBlock::iterator MBBI,
33                            unsigned SrcReg, int FrameIndex,
34                            const TargetRegisterClass *RC) const;
35
36   void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
37                       SmallVectorImpl<MachineOperand> &Addr,
38                       const TargetRegisterClass *RC,
39                       SmallVectorImpl<MachineInstr*> &NewMIs) const;
40
41   void loadRegFromStackSlot(MachineBasicBlock &MBB,
42                             MachineBasicBlock::iterator MBBI,
43                             unsigned DestReg, int FrameIndex,
44                             const TargetRegisterClass *RC) const;
45   
46   void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
47                        SmallVectorImpl<MachineOperand> &Addr,
48                        const TargetRegisterClass *RC,
49                        SmallVectorImpl<MachineInstr*> &NewMIs) const;
50
51   MachineInstr* foldMemoryOperand(MachineInstr *MI, unsigned OpNum, 
52                                   int FrameIndex) const;
53
54   MachineInstr* foldMemoryOperand(MachineInstr* MI,
55                                   SmallVectorImpl<unsigned> &UseOps,
56                                   int FrameIndex) const {
57     return 0;
58   }
59
60   MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
61                                   MachineInstr* LoadMI) const {
62     return 0;
63   }
64
65   MachineInstr* foldMemoryOperand(MachineInstr* MI,
66                                   SmallVectorImpl<unsigned> &UseOps,
67                                   MachineInstr* LoadMI) const {
68     return 0;
69   }
70
71   void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
72                     unsigned DestReg, unsigned SrcReg,
73                     const TargetRegisterClass *DestRC,
74                     const TargetRegisterClass *SrcRC) const;
75
76   void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
77                      unsigned DestReg, const MachineInstr *Orig) const;
78
79   const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
80
81   const TargetRegisterClass* const* getCalleeSavedRegClasses(
82                                      const MachineFunction *MF = 0) const;
83
84   BitVector getReservedRegs(const MachineFunction &MF) const;
85
86   bool hasFP(const MachineFunction &MF) const;
87
88   void eliminateCallFramePseudoInstr(MachineFunction &MF,
89                                      MachineBasicBlock &MBB,
90                                      MachineBasicBlock::iterator I) const;
91
92   void eliminateFrameIndex(MachineBasicBlock::iterator II,
93                            int SPAdj, RegScavenger *RS = NULL) const;
94
95   //void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
96
97   void emitPrologue(MachineFunction &MF) const;
98   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
99
100   // Debug information queries.
101   unsigned getRARegister() const;
102   unsigned getFrameRegister(MachineFunction &MF) const;
103
104   // Exception handling queries.
105   unsigned getEHExceptionRegister() const;
106   unsigned getEHHandlerRegister() const;
107
108   int getDwarfRegNum(unsigned RegNum, bool isEH) const;
109
110   static std::string getPrettyName(unsigned reg);
111 };
112
113 } // end namespace llvm
114
115 #endif