1 //===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 #include "AlphaJITInfo.h"
15 #include "AlphaTargetAsmInfo.h"
16 #include "AlphaTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Support/raw_ostream.h"
24 // Register the targets
25 static RegisterTarget<AlphaTargetMachine> X("alpha", "Alpha [experimental]");
27 // No assembler printer by default
28 AlphaTargetMachine::AsmPrinterCtorFn AlphaTargetMachine::AsmPrinterCtor = 0;
30 // Force static initialization.
31 extern "C" void LLVMInitializeAlphaTarget() { }
33 const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
34 return new AlphaTargetAsmInfo(*this);
37 unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
38 // We strongly match "alpha*".
39 std::string TT = M.getTargetTriple();
40 if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
41 TT[3] == 'h' && TT[4] == 'a')
43 // If the target triple is something non-alpha, we don't match.
44 if (!TT.empty()) return 0;
46 if (M.getEndianness() == Module::LittleEndian &&
47 M.getPointerSize() == Module::Pointer64)
48 return 10; // Weak match
49 else if (M.getEndianness() != Module::AnyEndianness ||
50 M.getPointerSize() != Module::AnyPointerSize)
51 return 0; // Match for some other target
53 return getJITMatchQuality()/2;
56 unsigned AlphaTargetMachine::getJITMatchQuality() {
64 AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
65 : DataLayout("e-f128:128:128"),
66 FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
70 setRelocationModel(Reloc::PIC_);
74 //===----------------------------------------------------------------------===//
75 // Pass Pipeline Configuration
76 //===----------------------------------------------------------------------===//
78 bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
79 CodeGenOpt::Level OptLevel) {
80 PM.add(createAlphaISelDag(*this));
83 bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
84 CodeGenOpt::Level OptLevel) {
85 // Must run branch selection immediately preceding the asm printer
86 PM.add(createAlphaBranchSelectionPass());
89 bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
90 CodeGenOpt::Level OptLevel,
93 PM.add(createAlphaLLRPPass(*this));
94 // Output assembly language.
95 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
97 PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose));
100 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
101 CodeGenOpt::Level OptLevel,
102 bool DumpAsm, MachineCodeEmitter &MCE) {
103 PM.add(createAlphaCodeEmitterPass(*this, MCE));
105 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
107 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
111 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
112 CodeGenOpt::Level OptLevel,
113 bool DumpAsm, JITCodeEmitter &JCE) {
114 PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
116 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
118 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true));
122 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
123 CodeGenOpt::Level OptLevel,
125 MachineCodeEmitter &MCE) {
126 return addCodeEmitter(PM, OptLevel, DumpAsm, MCE);
128 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
129 CodeGenOpt::Level OptLevel,
131 JITCodeEmitter &JCE) {
132 return addCodeEmitter(PM, OptLevel, DumpAsm, JCE);