lib/Target/Alpha/AlphaTargetMachine.cpp

   1 //===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "Alpha.h"
  14 #include "AlphaJITInfo.h"
  15 #include "AlphaTargetAsmInfo.h"
  16 #include "AlphaTargetMachine.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/Support/FormattedStream.h"
  19 #include "llvm/Target/TargetRegistry.h"
  20
  21 using namespace llvm;
  22
  23 extern "C" void LLVMInitializeAlphaTarget() {
  24   // Register the target.
  25   RegisterTargetMachine<AlphaTargetMachine> X(TheAlphaTarget);
  26 }
  27
  28 const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
  29   return new AlphaTargetAsmInfo();
  30 }
  31
  32 AlphaTargetMachine::AlphaTargetMachine(const Target &T, const std::string &TT,
  33                                        const std::string &FS)
  34   : LLVMTargetMachine(T),
  35     DataLayout("e-f128:128:128"),
  36     FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
  37     JITInfo(*this),
  38     Subtarget(TT, FS),
  39     TLInfo(*this) {
  40   setRelocationModel(Reloc::PIC_);
  41 }
  42
  43
  44 //===----------------------------------------------------------------------===//
  45 // Pass Pipeline Configuration
  46 //===----------------------------------------------------------------------===//
  47
  48 bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
  49                                          CodeGenOpt::Level OptLevel) {
  50   PM.add(createAlphaISelDag(*this));
  51   return false;
  52 }
  53 bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
  54                                         CodeGenOpt::Level OptLevel) {
  55   // Must run branch selection immediately preceding the asm printer
  56   PM.add(createAlphaBranchSelectionPass());
  57   PM.add(createAlphaLLRPPass(*this));
  58   return false;
  59 }
  60 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
  61                                         CodeGenOpt::Level OptLevel,
  62                                         MachineCodeEmitter &MCE) {
  63   PM.add(createAlphaCodeEmitterPass(*this, MCE));
  64   return false;
  65 }
  66 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
  67                                         CodeGenOpt::Level OptLevel,
  68                                         JITCodeEmitter &JCE) {
  69   PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
  70   return false;
  71 }
  72 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
  73                                         CodeGenOpt::Level OptLevel,
  74                                         ObjectCodeEmitter &OCE) {
  75   PM.add(createAlphaObjectCodeEmitterPass(*this, OCE));
  76   return false;
  77 }
  78 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
  79                                               CodeGenOpt::Level OptLevel,
  80                                               MachineCodeEmitter &MCE) {
  81   return addCodeEmitter(PM, OptLevel, MCE);
  82 }
  83 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
  84                                               CodeGenOpt::Level OptLevel,
  85                                               JITCodeEmitter &JCE) {
  86   return addCodeEmitter(PM, OptLevel, JCE);
  87 }
  88 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
  89                                               CodeGenOpt::Level OptLevel,
  90                                               ObjectCodeEmitter &OCE) {
  91   return addCodeEmitter(PM, OptLevel, OCE);
  92 }
  93