Introduce new headers whose inclusion forces linking and
[oota-llvm.git] / lib / Target / Alpha / AlphaTargetMachine.cpp
1 //===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "Alpha.h"
14 #include "AlphaJITInfo.h"
15 #include "AlphaTargetAsmInfo.h"
16 #include "AlphaTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Support/raw_ostream.h"
21
22 using namespace llvm;
23
24 /// AlphaTargetMachineModule - Note that this is used on hosts that cannot link
25 /// in a library unless there are references into the library.  In particular,
26 /// it seems that it is not possible to get things to work on Win32 without
27 /// this.  Though it is unused, do not remove it.
28 extern "C" int AlphaTargetMachineModule;
29 int AlphaTargetMachineModule = 0;
30
31 // Register the targets
32 static RegisterTarget<AlphaTargetMachine> X("alpha", "Alpha [experimental]");
33
34 // Force static initialization when called from llvm/InitializeAllTargets.h
35 namespace llvm {
36   void InitializeAlphaTarget() { }
37 }
38
39 const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
40   return new AlphaTargetAsmInfo(*this);
41 }
42
43 unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
44   // We strongly match "alpha*".
45   std::string TT = M.getTargetTriple();
46   if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
47       TT[3] == 'h' && TT[4] == 'a')
48     return 20;
49   // If the target triple is something non-alpha, we don't match.
50   if (!TT.empty()) return 0;
51
52   if (M.getEndianness()  == Module::LittleEndian &&
53       M.getPointerSize() == Module::Pointer64)
54     return 10;                                   // Weak match
55   else if (M.getEndianness() != Module::AnyEndianness ||
56            M.getPointerSize() != Module::AnyPointerSize)
57     return 0;                                    // Match for some other target
58
59   return getJITMatchQuality()/2;
60 }
61
62 unsigned AlphaTargetMachine::getJITMatchQuality() {
63 #ifdef __alpha
64   return 10;
65 #else
66   return 0;
67 #endif
68 }
69
70 AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
71   : DataLayout("e-f128:128:128"),
72     FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
73     JITInfo(*this),
74     Subtarget(M, FS),
75     TLInfo(*this) {
76   setRelocationModel(Reloc::PIC_);
77 }
78
79
80 //===----------------------------------------------------------------------===//
81 // Pass Pipeline Configuration
82 //===----------------------------------------------------------------------===//
83
84 bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
85                                          CodeGenOpt::Level OptLevel) {
86   PM.add(createAlphaISelDag(*this));
87   return false;
88 }
89 bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
90                                         CodeGenOpt::Level OptLevel) {
91   // Must run branch selection immediately preceding the asm printer
92   PM.add(createAlphaBranchSelectionPass());
93   return false;
94 }
95 bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
96                                             CodeGenOpt::Level OptLevel,
97                                             bool Verbose,
98                                             raw_ostream &Out) {
99   PM.add(createAlphaLLRPPass(*this));
100   PM.add(createAlphaCodePrinterPass(Out, *this, OptLevel, Verbose));
101   return false;
102 }
103 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
104                                         CodeGenOpt::Level OptLevel,
105                                         bool DumpAsm, MachineCodeEmitter &MCE) {
106   PM.add(createAlphaCodeEmitterPass(*this, MCE));
107   if (DumpAsm)
108     PM.add(createAlphaCodePrinterPass(errs(), *this, OptLevel, true));
109   return false;
110 }
111 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
112                                         CodeGenOpt::Level OptLevel,
113                                         bool DumpAsm, JITCodeEmitter &JCE) {
114   PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
115   if (DumpAsm)
116     PM.add(createAlphaCodePrinterPass(errs(), *this, OptLevel, true));
117   return false;
118 }
119 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
120                                               CodeGenOpt::Level OptLevel,
121                                               bool DumpAsm,
122                                               MachineCodeEmitter &MCE) {
123   return addCodeEmitter(PM, OptLevel, DumpAsm, MCE);
124 }
125 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
126                                               CodeGenOpt::Level OptLevel,
127                                               bool DumpAsm,
128                                               JITCodeEmitter &JCE) {
129   return addCodeEmitter(PM, OptLevel, DumpAsm, JCE);
130 }
131