1 //===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
14 #include "AlphaJITInfo.h"
15 #include "AlphaTargetAsmInfo.h"
16 #include "AlphaTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Support/raw_ostream.h"
24 // Register the targets
25 static RegisterTarget<AlphaTargetMachine> X("alpha", "Alpha [experimental]");
27 const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
28 return new AlphaTargetAsmInfo(*this);
31 unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
32 // We strongly match "alpha*".
33 std::string TT = M.getTargetTriple();
34 if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
35 TT[3] == 'h' && TT[4] == 'a')
37 // If the target triple is something non-alpha, we don't match.
38 if (!TT.empty()) return 0;
40 if (M.getEndianness() == Module::LittleEndian &&
41 M.getPointerSize() == Module::Pointer64)
42 return 10; // Weak match
43 else if (M.getEndianness() != Module::AnyEndianness ||
44 M.getPointerSize() != Module::AnyPointerSize)
45 return 0; // Match for some other target
47 return getJITMatchQuality()/2;
50 unsigned AlphaTargetMachine::getJITMatchQuality() {
58 AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
59 : DataLayout("e-f128:128:128"),
60 FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
64 setRelocationModel(Reloc::PIC_);
68 //===----------------------------------------------------------------------===//
69 // Pass Pipeline Configuration
70 //===----------------------------------------------------------------------===//
72 bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
73 PM.add(createAlphaISelDag(*this));
76 bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
77 // Must run branch selection immediately preceding the asm printer
78 PM.add(createAlphaBranchSelectionPass());
81 bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast,
83 PM.add(createAlphaLLRPPass(*this));
84 PM.add(createAlphaCodePrinterPass(Out, *this));
87 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
88 bool DumpAsm, MachineCodeEmitter &MCE) {
89 PM.add(createAlphaCodeEmitterPass(*this, MCE));
91 PM.add(createAlphaCodePrinterPass(errs(), *this));
94 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
95 bool Fast, bool DumpAsm,
96 MachineCodeEmitter &MCE) {
97 return addCodeEmitter(PM, Fast, DumpAsm, MCE);