1 //===- SPU.td - Describe the STI Cell SPU Target Machine ----*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is the top level entry point for the STI Cell SPU target machine.
12 //===----------------------------------------------------------------------===//
14 // Get the target-independent interfaces which we are implementing.
16 include "../Target.td"
18 //===----------------------------------------------------------------------===//
19 // Register File Description
20 //===----------------------------------------------------------------------===//
22 include "SPURegisterInfo.td"
24 //===----------------------------------------------------------------------===//
25 // Instruction formats, instructions
26 //===----------------------------------------------------------------------===//
29 include "SPUOperands.td"
30 include "SPUSchedule.td"
31 include "SPUInstrFormats.td"
32 include "SPUInstrInfo.td"
34 //===----------------------------------------------------------------------===//
35 // Subtarget features:
36 //===----------------------------------------------------------------------===//
38 def DefaultProc: SubtargetFeature<"", "ProcDirective", "SPU::DEFAULT_PROC", "">;
40 SubtargetFeature<"large_mem","UseLargeMem", "true",
41 "Use large (>256) LSA memory addressing [default = false]">;
43 def SPURev0 : Processor<"v0", SPUItineraries, [DefaultProc]>;
45 //===----------------------------------------------------------------------===//
46 // Calling convention:
47 //===----------------------------------------------------------------------===//
49 include "SPUCallingConv.td"
53 def SPUInstrInfo : InstrInfo {
54 let isLittleEndianEncoding = 1;
58 let InstructionSet = SPUInstrInfo;