ec41e540b555322d1d67805c4984b30549f46d14
[oota-llvm.git] / lib / Target / CellSPU / SPU.td
1 //===- SPU.td - Describe the STI Cell SPU Target Machine ----*- tablegen -*-===//
2 // 
3 //                     The LLVM Compiler Infrastructure
4 //
5 //
6 // This file was developed by a team from the Computer Systems Research
7 // Department at The Aerospace Corporation.
8 //
9 // See README.txt for details.
10 //===----------------------------------------------------------------------===//
11 //
12 // This is the top level entry point for the STI Cell SPU target machine.
13 //
14 //===----------------------------------------------------------------------===//
15
16 // Get the target-independent interfaces which we are implementing.
17 //
18 include "../Target.td"
19
20 //===----------------------------------------------------------------------===//
21 // Register File Description
22 //===----------------------------------------------------------------------===//
23
24 include "SPURegisterInfo.td"
25
26 //===----------------------------------------------------------------------===//
27 // Instruction formats, instructions
28 //===----------------------------------------------------------------------===//
29
30 include "SPUNodes.td"
31 include "SPUOperands.td"
32 include "SPUSchedule.td"
33 include "SPUInstrFormats.td"
34 include "SPUInstrInfo.td"
35
36 //===----------------------------------------------------------------------===//
37 // Subtarget features:
38 //===----------------------------------------------------------------------===//
39
40 def DefaultProc: SubtargetFeature<"", "ProcDirective", "SPU::DEFAULT_PROC", "">;
41 def LargeMemFeature:
42   SubtargetFeature<"large_mem","UseLargeMem", "true",
43                    "Use large (>256) LSA memory addressing [default = false]">;
44
45 def SPURev0 : Processor<"v0", SPUItineraries, [DefaultProc]>;
46
47 //===----------------------------------------------------------------------===//
48 // Calling convention:
49 //===----------------------------------------------------------------------===//
50
51 include "SPUCallingConv.td"
52
53 // Target:
54
55 def SPUInstrInfo : InstrInfo {
56   let isLittleEndianEncoding = 1;
57 }
58
59 def SPU : Target {
60   let InstructionSet = SPUInstrInfo;
61 }