1 //===- SPUCallingConv.td - Calling Conventions for CellSPU ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This describes the calling conventions for the STI Cell SPU architecture.
12 //===----------------------------------------------------------------------===//
14 /// CCIfSubtarget - Match if the current subtarget has a feature F.
15 class CCIfSubtarget<string F, CCAction A>
16 : CCIf<!strconcat("State.getTarget().getSubtarget<PPCSubtarget>().", F), A>;
18 //===----------------------------------------------------------------------===//
19 // Return Value Calling Convention
20 //===----------------------------------------------------------------------===//
22 // Return-value convention for Cell SPU: Everything can be passed back via $3:
23 def RetCC_SPU : CallingConv<[
24 CCIfType<[i32], CCAssignToReg<[R3]>>,
25 CCIfType<[i64], CCAssignToReg<[R3]>>,
26 CCIfType<[f32, f64], CCAssignToReg<[R3]>>,
27 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>
31 //===----------------------------------------------------------------------===//
32 // CellSPU Argument Calling Conventions
34 //===----------------------------------------------------------------------===//
36 def CC_SPU : CallingConv<[
37 // The first 8 integer arguments are passed in integer registers.
38 CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
39 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
41 // SPU can pass back arguments in all
42 CCIfType<[f32, f64], CCIfSubtarget<"isMachoABI()",
43 CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8,F9,F10,F11,F12,F13]>>>,
44 // Other sub-targets pass FP values in F1-10.
45 CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8, F9,F10]>>,
47 // The first 12 Vector arguments are passed in altivec registers.
48 CCIfType<[v16i8, v8i16, v4i32, v4f32],
49 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10,V11,V12,V13]>>
51 // Integer/FP values get stored in stack slots that are 8 bytes in size and
52 // 8-byte aligned if there are no more registers to hold them.
53 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
55 // Vectors get 16-byte stack slots that are 16-byte aligned.
56 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
57 CCAssignToStack<16, 16>>*/