Fix for bug reported by Evzen Muller on llvm-commits: make sure to correctly
[oota-llvm.git] / lib / Target / CellSPU / SPUCallingConv.td
1 //===- SPUCallingConv.td - Calling Conventions for CellSPU ------*- C++ -*-===//
2 // 
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 // 
8 //===----------------------------------------------------------------------===//
9 //
10 // This describes the calling conventions for the STI Cell SPU architecture.
11 //
12 //===----------------------------------------------------------------------===//
13
14 /// CCIfSubtarget - Match if the current subtarget has a feature F.
15 class CCIfSubtarget<string F, CCAction A>
16  : CCIf<!strconcat("State.getTarget().getSubtarget<PPCSubtarget>().", F), A>;
17
18 //===----------------------------------------------------------------------===//
19 // Return Value Calling Convention
20 //===----------------------------------------------------------------------===//
21
22 // Return-value convention for Cell SPU: Everything can be passed back via $3:
23 def RetCC_SPU : CallingConv<[
24   CCIfType<[i8],       CCAssignToReg<[R3]>>,
25   CCIfType<[i16],      CCAssignToReg<[R3]>>,
26   CCIfType<[i32],      CCAssignToReg<[R3]>>,
27   CCIfType<[i64],      CCAssignToReg<[R3]>>,
28   CCIfType<[i128],     CCAssignToReg<[R3]>>,
29   CCIfType<[f32, f64], CCAssignToReg<[R3]>>,
30   CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>,
31   CCIfType<[v2i32],                                    CCAssignToReg<[R3]>>
32 ]>;
33
34
35 //===----------------------------------------------------------------------===//
36 // CellSPU Argument Calling Conventions
37 //===----------------------------------------------------------------------===//
38 def CCC_SPU : CallingConv<[
39   CCIfType<[i8, i16, i32, i64, i128, f32, f64, 
40             v16i8, v8i16, v4i32, v4f32, v2i64, v2f64],
41             CCAssignToReg<[R3,   R4,  R5,  R6,  R7,  R8,  R9, R10, R11,
42                            R12, R13, R14, R15, R16, R17, R18, R19, R20,
43                            R21, R22, R23, R24, R25, R26, R27, R28, R29,
44                            R30, R31, R32, R33, R34, R35, R36, R37, R38,
45                            R39, R40, R41, R42, R43, R44, R45, R46, R47,
46                            R48, R49, R50, R51, R52, R53, R54, R55, R56,
47                            R57, R58, R59, R60, R61, R62, R63, R64, R65,
48                            R66, R67, R68, R69, R70, R71, R72, R73, R74,
49                            R75, R76, R77, R78, R79]>>,
50   // Integer/FP values get stored in stack slots that are 8 bytes in size and
51   // 8-byte aligned if there are no more registers to hold them.
52   CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
53   
54   // Vectors get 16-byte stack slots that are 16-byte aligned.
55   CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
56               CCAssignToStack<16, 16>>
57 ]>;