1 //===- SPUInstrInfo.h - Cell SPU Instruction Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the CellSPU implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef SPU_INSTRUCTIONINFO_H
15 #define SPU_INSTRUCTIONINFO_H
18 #include "llvm/Target/TargetInstrInfo.h"
19 #include "SPURegisterInfo.h"
22 //! Cell SPU instruction information class
23 class SPUInstrInfo : public TargetInstrInfoImpl {
25 const SPURegisterInfo RI;
27 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
29 const SmallVectorImpl<unsigned> &Ops,
30 int FrameIndex) const;
32 virtual MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
34 const SmallVectorImpl<unsigned> &Ops,
35 MachineInstr* LoadMI) const {
40 explicit SPUInstrInfo(SPUTargetMachine &tm);
42 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
43 /// such, whenever a client has an instance of instruction info, it should
44 /// always be able to get register info as well (through this method).
46 virtual const SPURegisterInfo &getRegisterInfo() const { return RI; }
48 /// Return true if the instruction is a register to register move and return
49 /// the source and dest operands and their sub-register indices by reference.
50 virtual bool isMoveInstr(const MachineInstr &MI,
51 unsigned &SrcReg, unsigned &DstReg,
52 unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
54 unsigned isLoadFromStackSlot(const MachineInstr *MI,
55 int &FrameIndex) const;
56 unsigned isStoreToStackSlot(const MachineInstr *MI,
57 int &FrameIndex) const;
59 virtual bool copyRegToReg(MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator MI,
61 unsigned DestReg, unsigned SrcReg,
62 const TargetRegisterClass *DestRC,
63 const TargetRegisterClass *SrcRC) const;
65 //! Store a register to a stack slot, based on its register class.
66 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
67 MachineBasicBlock::iterator MBBI,
68 unsigned SrcReg, bool isKill, int FrameIndex,
69 const TargetRegisterClass *RC) const;
71 //! Load a register from a stack slot, based on its register class.
72 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
73 MachineBasicBlock::iterator MBBI,
74 unsigned DestReg, int FrameIndex,
75 const TargetRegisterClass *RC) const;
77 //! Return true if the specified load or store can be folded
79 bool canFoldMemoryOperand(const MachineInstr *MI,
80 const SmallVectorImpl<unsigned> &Ops) const;
82 //! Reverses a branch's condition, returning false on success.
84 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
86 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
87 MachineBasicBlock *&FBB,
88 SmallVectorImpl<MachineOperand> &Cond,
89 bool AllowModify) const;
91 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
93 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
94 MachineBasicBlock *FBB,
95 const SmallVectorImpl<MachineOperand> &Cond) const;