1 //===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by a team from the Computer Systems Research
6 // Department at The Aerospace Corporation and is distributed under the
7 // University of Illinois Open Source License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 // This file contains the Cell SPU implementation of the MRegisterInfo class.
13 //===----------------------------------------------------------------------===//
15 #ifndef SPU_REGISTERINFO_H
16 #define SPU_REGISTERINFO_H
19 #include "SPUGenRegisterInfo.h.inc"
23 class TargetInstrInfo;
26 class SPURegisterInfo : public SPUGenRegisterInfo {
28 const SPUSubtarget &Subtarget;
29 const TargetInstrInfo &TII;
31 //! Predicate: Does the machine function use the link register?
32 bool usesLR(MachineFunction &MF) const;
35 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
37 //! Translate a register's enum value to a register number
39 This method translates a register's enum value to it's regiser number,
42 static unsigned getRegisterNumbering(unsigned RegEnum);
44 //! Store a register to a stack slot, based on its register class.
45 void storeRegToStackSlot(MachineBasicBlock &MBB,
46 MachineBasicBlock::iterator MBBI,
47 unsigned SrcReg, bool isKill, int FrameIndex,
48 const TargetRegisterClass *RC) const;
50 //! Store a register to an address, based on its register class
51 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
52 SmallVectorImpl<MachineOperand> &Addr,
53 const TargetRegisterClass *RC,
54 SmallVectorImpl<MachineInstr*> &NewMIs) const;
56 //! Load a register from a stack slot, based on its register class.
57 void loadRegFromStackSlot(MachineBasicBlock &MBB,
58 MachineBasicBlock::iterator MBBI,
59 unsigned DestReg, int FrameIndex,
60 const TargetRegisterClass *RC) const;
62 //! Loqad a register from an address, based on its register class
63 virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
64 SmallVectorImpl<MachineOperand> &Addr,
65 const TargetRegisterClass *RC,
66 SmallVectorImpl<MachineInstr*> &NewMIs) const;
68 //! Copy a register to another
69 void copyRegToReg(MachineBasicBlock &MBB,
70 MachineBasicBlock::iterator MI,
71 unsigned DestReg, unsigned SrcReg,
72 const TargetRegisterClass *DestRC,
73 const TargetRegisterClass *SrcRC) const;
75 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
76 unsigned DestReg, const MachineInstr *Orig) const;
78 //! Fold spills into load/store instructions
79 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
80 SmallVectorImpl<unsigned> &Ops,
81 int FrameIndex) const;
83 //! Fold any load/store to an operand
84 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
85 SmallVectorImpl<unsigned> &Ops,
86 MachineInstr* LoadMI) const;
88 //! Return the array of callee-saved registers
89 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
91 //! Return the register class array of the callee-saved registers
92 virtual const TargetRegisterClass* const *
93 getCalleeSavedRegClasses(const MachineFunction *MF) const;
95 //! Return the reserved registers
96 BitVector getReservedRegs(const MachineFunction &MF) const;
98 //! Prediate: Target has dedicated frame pointer
99 bool hasFP(const MachineFunction &MF) const;
100 //! Eliminate the call frame setup pseudo-instructions
101 void eliminateCallFramePseudoInstr(MachineFunction &MF,
102 MachineBasicBlock &MBB,
103 MachineBasicBlock::iterator I) const;
104 //! Convert frame indicies into machine operands
105 void eliminateFrameIndex(MachineBasicBlock::iterator II, int,
106 RegScavenger *RS) const;
107 //! Determine the frame's layour
108 void determineFrameLayout(MachineFunction &MF) const;
110 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
111 RegScavenger *RS = NULL) const;
112 //! Emit the function prologue
113 void emitPrologue(MachineFunction &MF) const;
114 //! Emit the function epilogue
115 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
116 //! Get return address register (LR, aka R0)
117 unsigned getRARegister() const;
118 //! Get the stack frame register (SP, aka R1)
119 unsigned getFrameRegister(MachineFunction &MF) const;
120 //! Perform target-specific stack frame setup.
121 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
123 //------------------------------------------------------------------------
124 // New methods added:
125 //------------------------------------------------------------------------
127 //! Return the array of argument passing registers
129 \note The size of this array is returned by getArgRegsSize().
131 static const unsigned *getArgRegs();
133 //! Return the size of the argument passing register array
134 static const unsigned getNumArgRegs();
136 //! Get DWARF debugging register number
137 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
139 } // end namespace llvm