1 //===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Cell SPU implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef SPU_REGISTERINFO_H
15 #define SPU_REGISTERINFO_H
18 #include "SPUGenRegisterInfo.h.inc"
22 class TargetInstrInfo;
25 class SPURegisterInfo : public SPUGenRegisterInfo {
27 const SPUSubtarget &Subtarget;
28 const TargetInstrInfo &TII;
30 //! Predicate: Does the machine function use the link register?
31 bool usesLR(MachineFunction &MF) const;
34 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
36 //! Translate a register's enum value to a register number
38 This method translates a register's enum value to it's regiser number,
41 static unsigned getRegisterNumbering(unsigned RegEnum);
43 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
44 unsigned DestReg, const MachineInstr *Orig) const;
46 //! Return the array of callee-saved registers
47 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
49 //! Return the register class array of the callee-saved registers
50 virtual const TargetRegisterClass* const *
51 getCalleeSavedRegClasses(const MachineFunction *MF) const;
53 //! Return the reserved registers
54 BitVector getReservedRegs(const MachineFunction &MF) const;
56 //! Prediate: Target has dedicated frame pointer
57 bool hasFP(const MachineFunction &MF) const;
58 //! Eliminate the call frame setup pseudo-instructions
59 void eliminateCallFramePseudoInstr(MachineFunction &MF,
60 MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator I) const;
62 //! Convert frame indicies into machine operands
63 void eliminateFrameIndex(MachineBasicBlock::iterator II, int,
64 RegScavenger *RS) const;
65 //! Determine the frame's layour
66 void determineFrameLayout(MachineFunction &MF) const;
68 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
69 RegScavenger *RS = NULL) const;
70 //! Emit the function prologue
71 void emitPrologue(MachineFunction &MF) const;
72 //! Emit the function epilogue
73 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
74 //! Get return address register (LR, aka R0)
75 unsigned getRARegister() const;
76 //! Get the stack frame register (SP, aka R1)
77 unsigned getFrameRegister(MachineFunction &MF) const;
78 //! Perform target-specific stack frame setup.
79 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
81 //------------------------------------------------------------------------
83 //------------------------------------------------------------------------
85 //! Return the array of argument passing registers
87 \note The size of this array is returned by getArgRegsSize().
89 static const unsigned *getArgRegs();
91 //! Return the size of the argument passing register array
92 static const unsigned getNumArgRegs();
94 //! Get DWARF debugging register number
95 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
97 } // end namespace llvm