1 //===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Cell SPU implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef SPU_REGISTERINFO_H
15 #define SPU_REGISTERINFO_H
18 #include "SPUGenRegisterInfo.h.inc"
22 class TargetInstrInfo;
25 class SPURegisterInfo : public SPUGenRegisterInfo {
27 const SPUSubtarget &Subtarget;
28 const TargetInstrInfo &TII;
30 //! Predicate: Does the machine function use the link register?
31 bool usesLR(MachineFunction &MF) const;
34 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
36 //! Translate a register's enum value to a register number
38 This method translates a register's enum value to it's regiser number,
41 static unsigned getRegisterNumbering(unsigned RegEnum);
43 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
44 unsigned DestReg, const MachineInstr *Orig) const;
46 //! Fold spills into load/store instructions
47 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
48 SmallVectorImpl<unsigned> &Ops,
49 int FrameIndex) const;
51 //! Fold any load/store to an operand
52 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
53 SmallVectorImpl<unsigned> &Ops,
54 MachineInstr* LoadMI) const;
56 //! Return the array of callee-saved registers
57 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
59 //! Return the register class array of the callee-saved registers
60 virtual const TargetRegisterClass* const *
61 getCalleeSavedRegClasses(const MachineFunction *MF) const;
63 //! Return the reserved registers
64 BitVector getReservedRegs(const MachineFunction &MF) const;
66 //! Prediate: Target has dedicated frame pointer
67 bool hasFP(const MachineFunction &MF) const;
68 //! Eliminate the call frame setup pseudo-instructions
69 void eliminateCallFramePseudoInstr(MachineFunction &MF,
70 MachineBasicBlock &MBB,
71 MachineBasicBlock::iterator I) const;
72 //! Convert frame indicies into machine operands
73 void eliminateFrameIndex(MachineBasicBlock::iterator II, int,
74 RegScavenger *RS) const;
75 //! Determine the frame's layour
76 void determineFrameLayout(MachineFunction &MF) const;
78 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
79 RegScavenger *RS = NULL) const;
80 //! Emit the function prologue
81 void emitPrologue(MachineFunction &MF) const;
82 //! Emit the function epilogue
83 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
84 //! Get return address register (LR, aka R0)
85 unsigned getRARegister() const;
86 //! Get the stack frame register (SP, aka R1)
87 unsigned getFrameRegister(MachineFunction &MF) const;
88 //! Perform target-specific stack frame setup.
89 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
91 //------------------------------------------------------------------------
93 //------------------------------------------------------------------------
95 //! Return the array of argument passing registers
97 \note The size of this array is returned by getArgRegsSize().
99 static const unsigned *getArgRegs();
101 //! Return the size of the argument passing register array
102 static const unsigned getNumArgRegs();
104 //! Get DWARF debugging register number
105 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
107 } // end namespace llvm