ARM SRS instruction parsing, diassembly and encoding support.
[oota-llvm.git] / lib / Target / CellSPU / SPUTargetMachine.cpp
1 //===-- SPUTargetMachine.cpp - Define TargetMachine for Cell SPU ----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Top-level implementation for the Cell SPU target.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "SPU.h"
15 #include "SPUTargetMachine.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/CodeGen/RegAllocRegistry.h"
18 #include "llvm/CodeGen/SchedulerRegistry.h"
19 #include "llvm/Target/TargetRegistry.h"
20
21 using namespace llvm;
22
23 extern "C" void LLVMInitializeCellSPUTarget() { 
24   // Register the target.
25   RegisterTargetMachine<SPUTargetMachine> X(TheCellSPUTarget);
26 }
27
28 const std::pair<unsigned, int> *
29 SPUFrameLowering::getCalleeSaveSpillSlots(unsigned &NumEntries) const {
30   NumEntries = 1;
31   return &LR[0];
32 }
33
34 SPUTargetMachine::SPUTargetMachine(const Target &T, StringRef TT,
35                                    StringRef CPU, StringRef FS,
36                                    Reloc::Model RM, CodeModel::Model CM)
37   : LLVMTargetMachine(T, TT, CPU, FS, RM, CM),
38     Subtarget(TT, CPU, FS),
39     DataLayout(Subtarget.getTargetDataString()),
40     InstrInfo(*this),
41     FrameLowering(Subtarget),
42     TLInfo(*this),
43     TSInfo(*this),
44     InstrItins(Subtarget.getInstrItineraryData()) {
45 }
46
47 //===----------------------------------------------------------------------===//
48 // Pass Pipeline Configuration
49 //===----------------------------------------------------------------------===//
50
51 bool SPUTargetMachine::addInstSelector(PassManagerBase &PM,
52                                        CodeGenOpt::Level OptLevel) {
53   // Install an instruction selector.
54   PM.add(createSPUISelDag(*this));
55   return false;
56 }
57
58 // passes to run just before printing the assembly
59 bool SPUTargetMachine::
60 addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel) 
61 {
62   //align instructions with nops/lnops for dual issue
63   PM.add(createSPUNopFillerPass(*this));
64   return true;
65 }