[Hexagon] Generate instructions for operations on predicate registers
[oota-llvm.git] / lib / Target / Hexagon / CMakeLists.txt
1 set(LLVM_TARGET_DEFINITIONS Hexagon.td)
2
3 tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
7 tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
12 add_public_tablegen_target(HexagonCommonTableGen)
13
14 add_llvm_target(HexagonCodeGen
15   BitTracker.cpp
16   HexagonAsmPrinter.cpp
17   HexagonBitTracker.cpp
18   HexagonCFGOptimizer.cpp
19   HexagonCommonGEP.cpp
20   HexagonCopyToCombine.cpp
21   HexagonExpandCondsets.cpp
22   HexagonExpandPredSpillCode.cpp
23   HexagonFixupHwLoops.cpp
24   HexagonFrameLowering.cpp
25   HexagonGenExtract.cpp
26   HexagonGenInsert.cpp
27   HexagonGenPredicate.cpp
28   HexagonHardwareLoops.cpp
29   HexagonInstrInfo.cpp
30   HexagonISelDAGToDAG.cpp
31   HexagonISelLowering.cpp
32   HexagonMachineFunctionInfo.cpp
33   HexagonMachineScheduler.cpp
34   HexagonMCInstLower.cpp
35   HexagonNewValueJump.cpp
36   HexagonPeephole.cpp
37   HexagonRegisterInfo.cpp
38   HexagonRemoveSZExtArgs.cpp
39   HexagonSelectionDAGInfo.cpp
40   HexagonSplitConst32AndConst64.cpp
41   HexagonSubtarget.cpp
42   HexagonTargetMachine.cpp
43   HexagonTargetObjectFile.cpp
44   HexagonVLIWPacketizer.cpp
45 )
46
47 add_subdirectory(TargetInfo)
48 add_subdirectory(MCTargetDesc)
49 add_subdirectory(Disassembler)