1 //===-- HexagonAsmPrinter.cpp - Print machine instrs to Hexagon assembly ----=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to Hexagon assembly language. This printer is
12 // the output mechanism used by `llc'.
14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/
15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
17 //===----------------------------------------------------------------------===//
20 #define DEBUG_TYPE "asm-printer"
22 #include "HexagonTargetMachine.h"
23 #include "HexagonSubtarget.h"
24 #include "HexagonMachineFunctionInfo.h"
25 #include "llvm/Constants.h"
26 #include "llvm/DerivedTypes.h"
27 #include "llvm/Module.h"
28 #include "llvm/Assembly/Writer.h"
29 #include "llvm/CodeGen/AsmPrinter.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/CodeGen/MachineFunctionPass.h"
32 #include "llvm/CodeGen/MachineInstr.h"
33 #include "llvm/CodeGen/MachineInstrBuilder.h"
34 #include "llvm/MC/MCStreamer.h"
35 #include "llvm/MC/MCAsmInfo.h"
36 #include "llvm/MC/MCSymbol.h"
37 #include "llvm/Support/MathExtras.h"
38 #include "llvm/Support/MathExtras.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/Compiler.h"
42 #include "llvm/Support/raw_ostream.h"
43 #include "llvm/Target/Mangler.h"
44 #include "llvm/Target/TargetData.h"
45 #include "llvm/Target/TargetLoweringObjectFile.h"
46 #include "llvm/Target/TargetRegisterInfo.h"
47 #include "llvm/Target/TargetInstrInfo.h"
48 #include "llvm/Target/TargetOptions.h"
49 #include "llvm/ADT/SmallPtrSet.h"
50 #include "llvm/ADT/SmallString.h"
51 #include "llvm/ADT/StringExtras.h"
52 #include "llvm/Support/TargetRegistry.h"
53 #include "llvm/Support/raw_ostream.h"
57 static cl::opt<bool> AlignCalls(
58 "hexagon-align-calls", cl::Hidden, cl::init(true),
59 cl::desc("Insert falign after call instruction for Hexagon target"));
63 class HexagonAsmPrinter : public AsmPrinter {
64 const HexagonSubtarget *Subtarget;
67 explicit HexagonAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
68 : AsmPrinter(TM, Streamer) {
69 Subtarget = &TM.getSubtarget<HexagonSubtarget>();
72 virtual const char *getPassName() const {
73 return "Hexagon Assembly Printer";
76 /// printInstruction - This method is automatically generated by tablegen
77 /// from the instruction set description. This method returns true if the
78 /// machine instruction was sufficiently described to print it, otherwise it
79 void printInstruction(const MachineInstr *MI, raw_ostream &O);
80 virtual void EmitInstruction(const MachineInstr *MI);
82 void printOp(const MachineOperand &MO, raw_ostream &O);
84 /// printRegister - Print register according to target requirements.
86 void printRegister(const MachineOperand &MO, bool R0AsZero,
88 unsigned RegNo = MO.getReg();
89 assert(TargetRegisterInfo::isPhysicalRegister(RegNo) && "Not physreg??");
90 O << getRegisterName(RegNo);
93 void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &OS) {
94 const MachineOperand &MO = MI->getOperand(OpNo);
96 printRegister(MO, false, OS);
97 } else if (MO.isImm()) {
105 bool isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const;
107 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
108 unsigned AsmVariant, const char *ExtraCode,
110 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
111 unsigned AsmVariant, const char *ExtraCode,
115 void printHexagonImmOperand(const MachineInstr *MI, unsigned OpNo,
117 int value = MI->getOperand(OpNo).getImm();
122 void printHexagonNegImmOperand(const MachineInstr *MI, unsigned OpNo,
124 int value = MI->getOperand(OpNo).getImm();
128 void printHexagonNOneImmOperand(const MachineInstr *MI, unsigned OpNo,
129 raw_ostream &O) const {
133 void printHexagonMEMriOperand(const MachineInstr *MI, unsigned OpNo,
135 const MachineOperand &MO1 = MI->getOperand(OpNo);
136 const MachineOperand &MO2 = MI->getOperand(OpNo+1);
138 O << getRegisterName(MO1.getReg())
140 << (int) MO2.getImm();
144 void printHexagonFrameIndexOperand(const MachineInstr *MI, unsigned OpNo,
146 const MachineOperand &MO1 = MI->getOperand(OpNo);
147 const MachineOperand &MO2 = MI->getOperand(OpNo+1);
149 O << getRegisterName(MO1.getReg())
154 void printBranchOperand(const MachineInstr *MI, unsigned OpNo,
156 // Branches can take an immediate operand. This is used by the branch
157 // selection pass to print $+8, an eight byte displacement from the PC.
158 if (MI->getOperand(OpNo).isImm()) {
159 O << "$+" << MI->getOperand(OpNo).getImm()*4;
161 printOp(MI->getOperand(OpNo), O);
165 void printCallOperand(const MachineInstr *MI, unsigned OpNo,
169 void printAbsAddrOperand(const MachineInstr *MI, unsigned OpNo,
174 void printSymbolHi(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) {
176 if (MI->getOperand(OpNo).isImm()) {
177 printHexagonImmOperand(MI, OpNo, O);
179 printOp(MI->getOperand(OpNo), O);
184 void printSymbolLo(const MachineInstr *MI, unsigned OpNo, raw_ostream &O) {
186 if (MI->getOperand(OpNo).isImm()) {
187 printHexagonImmOperand(MI, OpNo, O);
189 printOp(MI->getOperand(OpNo), O);
194 void printPredicateOperand(const MachineInstr *MI, unsigned OpNo,
197 void printAddrModeBasePlusOffset(const MachineInstr *MI, int OpNo,
200 void printGlobalOperand(const MachineInstr *MI, int OpNo, raw_ostream &O);
201 void printJumpTable(const MachineInstr *MI, int OpNo, raw_ostream &O);
203 void EmitAlignment(unsigned NumBits, const GlobalValue *GV = 0) const;
205 static const char *getRegisterName(unsigned RegNo);
208 } // end of anonymous namespace
210 // Include the auto-generated portion of the assembly writer.
211 #include "HexagonGenAsmWriter.inc"
214 void HexagonAsmPrinter::EmitAlignment(unsigned NumBits,
215 const GlobalValue *GV) const {
217 // For basic block level alignment, use falign.
219 OutStreamer.EmitRawText(StringRef("\t.falign"));
223 AsmPrinter::EmitAlignment(NumBits, GV);
226 void HexagonAsmPrinter::printOp(const MachineOperand &MO, raw_ostream &O) {
227 switch (MO.getType()) {
228 case MachineOperand::MO_Immediate:
229 dbgs() << "printOp() does not handle immediate values\n";
232 case MachineOperand::MO_MachineBasicBlock:
233 O << *MO.getMBB()->getSymbol();
235 case MachineOperand::MO_JumpTableIndex:
236 O << *GetJTISymbol(MO.getIndex());
237 // FIXME: PIC relocation model.
239 case MachineOperand::MO_ConstantPoolIndex:
240 O << *GetCPISymbol(MO.getIndex());
242 case MachineOperand::MO_ExternalSymbol:
243 O << *GetExternalSymbolSymbol(MO.getSymbolName());
245 case MachineOperand::MO_GlobalAddress: {
246 // Computing the address of a global symbol, not calling it.
247 O << *Mang->getSymbol(MO.getGlobal());
248 printOffset(MO.getOffset(), O);
253 O << "<unknown operand type: " << MO.getType() << ">";
260 // isBlockOnlyReachableByFallthrough - We need to override this since the
261 // default AsmPrinter does not print labels for any basic block that
262 // is only reachable by a fall through. That works for all cases except
263 // for the case in which the basic block is reachable by a fall through but
264 // through an indirect from a jump table. In this case, the jump table
265 // will contain a label not defined by AsmPrinter.
267 bool HexagonAsmPrinter::
268 isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
269 if (MBB->hasAddressTaken()) {
272 return AsmPrinter::isBlockOnlyReachableByFallthrough(MBB);
276 /// PrintAsmOperand - Print out an operand for an inline asm expression.
278 bool HexagonAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
280 const char *ExtraCode,
282 // Does this asm operand have a single letter operand modifier?
283 if (ExtraCode && ExtraCode[0]) {
284 if (ExtraCode[1] != 0) return true; // Unknown modifier.
286 switch (ExtraCode[0]) {
287 default: return true; // Unknown modifier.
288 case 'c': // Don't print "$" before a global var name or constant.
289 // Hexagon never has a prefix.
290 printOperand(MI, OpNo, OS);
292 case 'L': // Write second word of DImode reference.
293 // Verify that this operand has two consecutive registers.
294 if (!MI->getOperand(OpNo).isReg() ||
295 OpNo+1 == MI->getNumOperands() ||
296 !MI->getOperand(OpNo+1).isReg())
298 ++OpNo; // Return the high-part.
301 // Write 'i' if an integer constant, otherwise nothing. Used to print
303 if (MI->getOperand(OpNo).isImm())
309 printOperand(MI, OpNo, OS);
313 bool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
314 unsigned OpNo, unsigned AsmVariant,
315 const char *ExtraCode,
317 if (ExtraCode && ExtraCode[0])
318 return true; // Unknown modifier.
320 const MachineOperand &Base = MI->getOperand(OpNo);
321 const MachineOperand &Offset = MI->getOperand(OpNo+1);
324 printOperand(MI, OpNo, O);
326 llvm_unreachable("Unimplemented");
328 if (Offset.isImm()) {
330 O << " + #" << Offset.getImm();
333 llvm_unreachable("Unimplemented");
338 void HexagonAsmPrinter::printPredicateOperand(const MachineInstr *MI,
341 llvm_unreachable("Unimplemented");
345 /// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to
346 /// the current output stream.
348 void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
349 SmallString<128> Str;
350 raw_svector_ostream O(Str);
352 const MachineFunction* MF = MI->getParent()->getParent();
353 const HexagonMachineFunctionInfo* MFI =
354 (const HexagonMachineFunctionInfo*)
355 MF->getInfo<HexagonMachineFunctionInfo>();
359 // Print a brace for the beginning of the packet.
360 if (MFI->isStartPacket(MI)) {
364 DEBUG( O << "// MI = " << *MI << '\n';);
370 if (MI->getOpcode() == Hexagon::ENDLOOP0) {
371 if (MFI->isEndPacket(MI) && MFI->isStartPacket(MI)) {
376 printInstruction(MI, O);
377 } else if (MI->getOpcode() == Hexagon::STriwt) {
379 // Handle truncated store on Hexagon.
382 printHexagonMEMriOperand(MI, 0, O);
386 TM.getRegisterInfo()->getSubReg(MI->getOperand(2)
387 .getReg(), Hexagon::subreg_loreg);
388 const char *SubRegName = getRegisterName(SubRegNum);
389 O << SubRegName << '\n';
390 } else if (MI->getOpcode() == Hexagon::MPYI_rin) {
391 // Handle multipy with -ve constant on Hexagon:
392 // "$dst =- mpyi($src1, #$src2)"
393 printOperand(MI, 0, O);
395 printOperand(MI, 1, O);
397 printHexagonNegImmOperand(MI, 2, O);
399 } else if (MI->getOpcode() == Hexagon::MEMw_ADDSUBi_indexed_MEM_V4) {
401 // Handle memw(Rs+u6:2) [+-]= #U5
403 O << "\tmemw("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
404 int addend = MI->getOperand(2).getImm();
406 O << "-= " << "#" << -addend << '\n';
408 O << "+= " << "#" << addend << '\n';
409 } else if (MI->getOpcode() == Hexagon::MEMw_ADDSUBi_MEM_V4) {
411 // Handle memw(Rs+u6:2) [+-]= #U5
413 O << "\tmemw("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
414 int addend = MI->getOperand(2).getImm();
416 O << "-= " << "#" << -addend << '\n';
418 O << "+= " << "#" << addend << '\n';
419 } else if (MI->getOpcode() == Hexagon::MEMh_ADDSUBi_indexed_MEM_V4) {
421 // Handle memh(Rs+u6:1) [+-]= #U5
423 O << "\tmemh("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
424 int addend = MI->getOperand(2).getImm();
426 O << "-= " << "#" << -addend << '\n';
428 O << "+= " << "#" << addend << '\n';
429 } else if (MI->getOpcode() == Hexagon::MEMh_ADDSUBi_MEM_V4) {
431 // Handle memh(Rs+u6:1) [+-]= #U5
433 O << "\tmemh("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
434 int addend = MI->getOperand(2).getImm();
436 O << "-= " << "#" << -addend << '\n';
438 O << "+= " << "#" << addend << '\n';
439 } else if (MI->getOpcode() == Hexagon::MEMb_ADDSUBi_indexed_MEM_V4) {
441 // Handle memb(Rs+u6:1) [+-]= #U5
443 O << "\tmemb("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
444 int addend = MI->getOperand(2).getImm();
446 O << "-= " << "#" << -addend << '\n';
448 O << "+= " << "#" << addend << '\n';
449 } else if (MI->getOpcode() == Hexagon::MEMb_ADDSUBi_MEM_V4) {
451 // Handle memb(Rs+u6:1) [+-]= #U5
453 O << "\tmemb("; printHexagonMEMriOperand(MI, 0, O); O << ") ";
454 int addend = MI->getOperand(2).getImm();
456 O << "-= " << "#" << -addend << '\n';
458 O << "+= " << "#" << addend << '\n';
459 } else if (MI->getOpcode() == Hexagon::CMPbGTri_V4) {
461 // Handle Pd=cmpb.gt(Rs,#s8)
464 printRegister(MI->getOperand(0), false, O);
466 printRegister(MI->getOperand(1), false, O);
468 int val = MI->getOperand(2).getImm() >> 24;
469 O << "#" << val << ")" << '\n';
470 } else if (MI->getOpcode() == Hexagon::CMPhEQri_V4) {
472 // Handle Pd=cmph.eq(Rs,#8)
475 printRegister(MI->getOperand(0), false, O);
477 printRegister(MI->getOperand(1), false, O);
479 int val = MI->getOperand(2).getImm();
480 assert((((0 <= val) && (val <= 127)) ||
481 ((65408 <= val) && (val <= 65535))) &&
482 "Not in correct range!");
483 if (val >= 65408) val -= 65536;
484 O << "#" << val << ")" << '\n';
485 } else if (MI->getOpcode() == Hexagon::CMPhGTri_V4) {
487 // Handle Pd=cmph.gt(Rs,#8)
490 printRegister(MI->getOperand(0), false, O);
492 printRegister(MI->getOperand(1), false, O);
494 int val = MI->getOperand(2).getImm() >> 16;
495 O << "#" << val << ")" << '\n';
497 printInstruction(MI, O);
500 // Print a brace for the end of the packet.
501 if (MFI->isEndPacket(MI) && MI->getOpcode() != Hexagon::ENDLOOP0) {
502 O << "\n\t}" << '\n';
505 if (AlignCalls && MI->getDesc().isCall()) {
506 O << "\n\t.falign" << "\n";
509 OutStreamer.EmitRawText(O.str());
513 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
514 /// Don't print things like \n or \0.
515 // static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
516 // for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
517 // Name != E; ++Name)
518 // if (isprint(*Name))
523 void HexagonAsmPrinter::printAddrModeBasePlusOffset(const MachineInstr *MI,
524 int OpNo, raw_ostream &O) {
525 const MachineOperand &MO1 = MI->getOperand(OpNo);
526 const MachineOperand &MO2 = MI->getOperand(OpNo+1);
528 O << getRegisterName(MO1.getReg())
534 void HexagonAsmPrinter::printGlobalOperand(const MachineInstr *MI, int OpNo,
536 const MachineOperand &MO = MI->getOperand(OpNo);
537 assert( (MO.getType() == MachineOperand::MO_GlobalAddress) &&
538 "Expecting global address");
540 O << *Mang->getSymbol(MO.getGlobal());
541 if (MO.getOffset() != 0) {
547 void HexagonAsmPrinter::printJumpTable(const MachineInstr *MI, int OpNo,
549 const MachineOperand &MO = MI->getOperand(OpNo);
550 assert( (MO.getType() == MachineOperand::MO_JumpTableIndex) &&
551 "Expecting jump table index");
553 // Hexagon_TODO: Do we need name mangling?
554 O << *GetJTISymbol(MO.getIndex());
557 extern "C" void LLVMInitializeHexagonAsmPrinter() {
558 RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget);