1 //===-- HexagonCallingConvLower.h - Calling Conventions ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Hexagon_CCState class, used for lowering
11 // and implementing calling conventions. Adapted from the target independent
12 // version but this handles calls to varargs functions
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_Hexagon_CODEGEN_CALLINGCONVLOWER_H
17 #define LLVM_Hexagon_CODEGEN_CALLINGCONVLOWER_H
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/CodeGen/CallingConvLower.h"
21 #include "llvm/CodeGen/SelectionDAGNodes.h"
22 #include "llvm/CodeGen/ValueTypes.h"
25 // Need to handle varargs.
28 class TargetRegisterInfo;
30 class Hexagon_CCState;
34 /// Hexagon_CCAssignFn - This function assigns a location for Val, updating
35 /// State to reflect the change.
36 typedef bool Hexagon_CCAssignFn(unsigned ValNo, EVT ValVT,
37 EVT LocVT, CCValAssign::LocInfo LocInfo,
38 ISD::ArgFlagsTy ArgFlags, Hexagon_CCState &State,
44 /// CCState - This class holds information needed while lowering arguments and
45 /// return values. It captures which registers are already assigned and which
46 /// stack slots are used. It provides accessors to allocate these values.
47 class Hexagon_CCState {
48 CallingConv::ID CallingConv;
50 const TargetMachine &TM;
51 SmallVectorImpl<CCValAssign> &Locs;
55 SmallVector<uint32_t, 16> UsedRegs;
57 Hexagon_CCState(CallingConv::ID CC, bool isVarArg, const TargetMachine &TM,
58 SmallVectorImpl<CCValAssign> &locs, LLVMContext &c);
60 void addLoc(const CCValAssign &V) {
64 LLVMContext &getContext() const { return Context; }
65 const TargetMachine &getTarget() const { return TM; }
66 unsigned getCallingConv() const { return CallingConv; }
67 bool isVarArg() const { return IsVarArg; }
69 unsigned getNextStackOffset() const { return StackOffset; }
71 /// isAllocated - Return true if the specified register (or an alias) is
73 bool isAllocated(unsigned Reg) const {
74 return UsedRegs[Reg/32] & (1 << (Reg&31));
77 /// AnalyzeFormalArguments - Analyze an ISD::FORMAL_ARGUMENTS node,
78 /// incorporating info about the formals into this state.
79 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
80 Hexagon_CCAssignFn Fn, unsigned SretValueInRegs);
82 /// AnalyzeReturn - Analyze the returned values of an ISD::RET node,
83 /// incorporating info about the result values into this state.
84 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
85 Hexagon_CCAssignFn Fn, unsigned SretValueInRegs);
87 /// AnalyzeCallOperands - Analyze an ISD::CALL node, incorporating info
88 /// about the passed values into this state.
89 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
90 Hexagon_CCAssignFn Fn, int NonVarArgsParams,
91 unsigned SretValueSize);
93 /// AnalyzeCallOperands - Same as above except it takes vectors of types
94 /// and argument flags.
95 void AnalyzeCallOperands(SmallVectorImpl<EVT> &ArgVTs,
96 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
97 Hexagon_CCAssignFn Fn);
99 /// AnalyzeCallResult - Analyze the return values of an ISD::CALL node,
100 /// incorporating info about the passed values into this state.
101 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
102 Hexagon_CCAssignFn Fn, unsigned SretValueInRegs);
104 /// AnalyzeCallResult - Same as above except it's specialized for calls which
105 /// produce a single value.
106 void AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn);
108 /// getFirstUnallocated - Return the first unallocated register in the set, or
109 /// NumRegs if they are all allocated.
110 unsigned getFirstUnallocated(const unsigned *Regs, unsigned NumRegs) const {
111 for (unsigned i = 0; i != NumRegs; ++i)
112 if (!isAllocated(Regs[i]))
117 /// AllocateReg - Attempt to allocate one register. If it is not available,
118 /// return zero. Otherwise, return the register, marking it and any aliases
120 unsigned AllocateReg(unsigned Reg) {
121 if (isAllocated(Reg)) return 0;
126 /// Version of AllocateReg with extra register to be shadowed.
127 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
128 if (isAllocated(Reg)) return 0;
130 MarkAllocated(ShadowReg);
134 /// AllocateReg - Attempt to allocate one of the specified registers. If none
135 /// are available, return zero. Otherwise, return the first one available,
136 /// marking it and any aliases as allocated.
137 unsigned AllocateReg(const unsigned *Regs, unsigned NumRegs) {
138 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
139 if (FirstUnalloc == NumRegs)
140 return 0; // Didn't find the reg.
142 // Mark the register and any aliases as allocated.
143 unsigned Reg = Regs[FirstUnalloc];
148 /// Version of AllocateReg with list of registers to be shadowed.
149 unsigned AllocateReg(const unsigned *Regs, const unsigned *ShadowRegs,
151 unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
152 if (FirstUnalloc == NumRegs)
153 return 0; // Didn't find the reg.
155 // Mark the register and any aliases as allocated.
156 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
158 MarkAllocated(ShadowReg);
162 /// AllocateStack - Allocate a chunk of stack space with the specified size
164 unsigned AllocateStack(unsigned Size, unsigned Align) {
165 assert(Align && ((Align-1) & Align) == 0); // Align is power of 2.
166 StackOffset = ((StackOffset + Align-1) & ~(Align-1));
167 unsigned Result = StackOffset;
172 // HandleByVal - Allocate a stack slot large enough to pass an argument by
173 // value. The size and alignment information of the argument is encoded in its
174 // parameter attribute.
175 void HandleByVal(unsigned ValNo, EVT ValVT,
176 EVT LocVT, CCValAssign::LocInfo LocInfo,
177 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
180 /// MarkAllocated - Mark a register and all of its aliases as allocated.
181 void MarkAllocated(unsigned Reg);
186 } // end namespace llvm