1 //===- HexagonOperands.td - Hexagon immediate processing -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illnois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Immediate operands.
12 let PrintMethod = "printImmOperand" in {
13 // f32Ext type is used to identify constant extended floating point immediates.
14 def f32Ext : Operand<f32>;
15 def s32Imm : Operand<i32>;
16 def s26_6Imm : Operand<i32>;
17 def s16Imm : Operand<i32>;
18 def s12Imm : Operand<i32>;
19 def s11Imm : Operand<i32>;
20 def s11_0Imm : Operand<i32>;
21 def s11_1Imm : Operand<i32>;
22 def s11_2Imm : Operand<i32>;
23 def s11_3Imm : Operand<i32>;
24 def s10Imm : Operand<i32>;
25 def s9Imm : Operand<i32>;
26 def m9Imm : Operand<i32>;
27 def s8Imm : Operand<i32>;
28 def s8Imm64 : Operand<i64>;
29 def s6Imm : Operand<i32>;
30 def s6_3Imm : Operand<i32>;
31 def s4Imm : Operand<i32>;
32 def s4_0Imm : Operand<i32>;
33 def s4_1Imm : Operand<i32>;
34 def s4_2Imm : Operand<i32>;
35 def s4_3Imm : Operand<i32>;
36 def u64Imm : Operand<i64>;
37 def u32Imm : Operand<i32>;
38 def u26_6Imm : Operand<i32>;
39 def u16Imm : Operand<i32>;
40 def u16_0Imm : Operand<i32>;
41 def u16_1Imm : Operand<i32>;
42 def u16_2Imm : Operand<i32>;
43 def u16_3Imm : Operand<i32>;
44 def u11_3Imm : Operand<i32>;
45 def u10Imm : Operand<i32>;
46 def u9Imm : Operand<i32>;
47 def u8Imm : Operand<i32>;
48 def u7Imm : Operand<i32>;
49 def u6Imm : Operand<i32>;
50 def u6_0Imm : Operand<i32>;
51 def u6_1Imm : Operand<i32>;
52 def u6_2Imm : Operand<i32>;
53 def u6_3Imm : Operand<i32>;
54 def u5Imm : Operand<i32>;
55 def u5_2Imm : Operand<i32>;
56 def u5_3Imm : Operand<i32>;
57 def u4Imm : Operand<i32>;
58 def u4_0Imm : Operand<i32>;
59 def u4_2Imm : Operand<i32>;
60 def u3Imm : Operand<i32>;
61 def u3_0Imm : Operand<i32>;
62 def u3_1Imm : Operand<i32>;
63 def u2Imm : Operand<i32>;
64 def u1Imm : Operand<i32>;
65 def n8Imm : Operand<i32>;
66 def m6Imm : Operand<i32>;
69 let PrintMethod = "printNOneImmOperand" in
70 def nOneImm : Operand<i32>;
73 // Immediate predicates
75 def s32ImmPred : PatLeaf<(i32 imm), [{
76 int64_t v = (int64_t)N->getSExtValue();
80 def s32_0ImmPred : PatLeaf<(i32 imm), [{
81 int64_t v = (int64_t)N->getSExtValue();
85 def s31_1ImmPred : PatLeaf<(i32 imm), [{
86 int64_t v = (int64_t)N->getSExtValue();
87 return isShiftedInt<31,1>(v);
90 def s30_2ImmPred : PatLeaf<(i32 imm), [{
91 int64_t v = (int64_t)N->getSExtValue();
92 return isShiftedInt<31,1>(v);
95 def s29_3ImmPred : PatLeaf<(i32 imm), [{
96 int64_t v = (int64_t)N->getSExtValue();
97 return isShiftedInt<31,1>(v);
100 def s22_10ImmPred : PatLeaf<(i32 imm), [{
101 int64_t v = (int64_t)N->getSExtValue();
102 return isShiftedInt<22,10>(v);
105 def s8_24ImmPred : PatLeaf<(i32 imm), [{
106 int64_t v = (int64_t)N->getSExtValue();
107 return isShiftedInt<8,24>(v);
110 def s16_16ImmPred : PatLeaf<(i32 imm), [{
111 int64_t v = (int64_t)N->getSExtValue();
112 return isShiftedInt<16,16>(v);
115 def s26_6ImmPred : PatLeaf<(i32 imm), [{
116 int64_t v = (int64_t)N->getSExtValue();
117 return isShiftedInt<26,6>(v);
120 def s16ImmPred : PatLeaf<(i32 imm), [{
121 int64_t v = (int64_t)N->getSExtValue();
125 def s13ImmPred : PatLeaf<(i32 imm), [{
126 int64_t v = (int64_t)N->getSExtValue();
130 def s12ImmPred : PatLeaf<(i32 imm), [{
131 int64_t v = (int64_t)N->getSExtValue();
135 def s11_0ImmPred : PatLeaf<(i32 imm), [{
136 int64_t v = (int64_t)N->getSExtValue();
140 def s11_1ImmPred : PatLeaf<(i32 imm), [{
141 int64_t v = (int64_t)N->getSExtValue();
142 return isShiftedInt<11,1>(v);
145 def s11_2ImmPred : PatLeaf<(i32 imm), [{
146 int64_t v = (int64_t)N->getSExtValue();
147 return isShiftedInt<11,2>(v);
150 def s11_3ImmPred : PatLeaf<(i32 imm), [{
151 int64_t v = (int64_t)N->getSExtValue();
152 return isShiftedInt<11,3>(v);
155 def s10ImmPred : PatLeaf<(i32 imm), [{
156 int64_t v = (int64_t)N->getSExtValue();
160 def s9ImmPred : PatLeaf<(i32 imm), [{
161 int64_t v = (int64_t)N->getSExtValue();
165 def m9ImmPred : PatLeaf<(i32 imm), [{
166 int64_t v = (int64_t)N->getSExtValue();
167 return isInt<9>(v) && (v != -256);
170 def s8ImmPred : PatLeaf<(i32 imm), [{
171 int64_t v = (int64_t)N->getSExtValue();
175 def s8Imm64Pred : PatLeaf<(i64 imm), [{
176 int64_t v = (int64_t)N->getSExtValue();
180 def s6ImmPred : PatLeaf<(i32 imm), [{
181 int64_t v = (int64_t)N->getSExtValue();
185 def s4_0ImmPred : PatLeaf<(i32 imm), [{
186 int64_t v = (int64_t)N->getSExtValue();
190 def s4_1ImmPred : PatLeaf<(i32 imm), [{
191 int64_t v = (int64_t)N->getSExtValue();
192 return isShiftedInt<4,1>(v);
195 def s4_2ImmPred : PatLeaf<(i32 imm), [{
196 int64_t v = (int64_t)N->getSExtValue();
197 return isShiftedInt<4,2>(v);
200 def s4_3ImmPred : PatLeaf<(i32 imm), [{
201 int64_t v = (int64_t)N->getSExtValue();
202 return isShiftedInt<4,3>(v);
206 def u64ImmPred : PatLeaf<(i64 imm), [{
207 // Adding "N ||" to suppress gcc unused warning.
211 def u32ImmPred : PatLeaf<(i32 imm), [{
212 int64_t v = (int64_t)N->getSExtValue();
213 return isUInt<32>(v);
216 def u32_0ImmPred : PatLeaf<(i32 imm), [{
217 int64_t v = (int64_t)N->getSExtValue();
218 return isUInt<32>(v);
221 def u31_1ImmPred : PatLeaf<(i32 imm), [{
222 int64_t v = (int64_t)N->getSExtValue();
223 return isShiftedUInt<31,1>(v);
226 def u30_2ImmPred : PatLeaf<(i32 imm), [{
227 int64_t v = (int64_t)N->getSExtValue();
228 return isShiftedUInt<30,2>(v);
231 def u29_3ImmPred : PatLeaf<(i32 imm), [{
232 int64_t v = (int64_t)N->getSExtValue();
233 return isShiftedUInt<29,3>(v);
236 def u26_6ImmPred : PatLeaf<(i32 imm), [{
237 int64_t v = (int64_t)N->getSExtValue();
238 return isShiftedUInt<26,6>(v);
241 def u16ImmPred : PatLeaf<(i32 imm), [{
242 int64_t v = (int64_t)N->getSExtValue();
243 return isUInt<16>(v);
246 def u16_s8ImmPred : PatLeaf<(i32 imm), [{
247 int64_t v = (int64_t)N->getSExtValue();
248 return isShiftedUInt<16,8>(v);
251 def u16_0ImmPred : PatLeaf<(i32 imm), [{
252 int64_t v = (int64_t)N->getSExtValue();
253 return isUInt<16>(v);
256 def u11_3ImmPred : PatLeaf<(i32 imm), [{
257 int64_t v = (int64_t)N->getSExtValue();
258 return isShiftedUInt<11,3>(v);
261 def u9ImmPred : PatLeaf<(i32 imm), [{
262 int64_t v = (int64_t)N->getSExtValue();
266 def u8ImmPred : PatLeaf<(i32 imm), [{
267 int64_t v = (int64_t)N->getSExtValue();
271 def u7StrictPosImmPred : ImmLeaf<i32, [{
272 // u7StrictPosImmPred predicate - True if the immediate fits in an 7-bit
273 // unsigned field and is strictly greater than 0.
274 return isUInt<7>(Imm) && Imm > 0;
277 def u7ImmPred : PatLeaf<(i32 imm), [{
278 int64_t v = (int64_t)N->getSExtValue();
282 def u6ImmPred : PatLeaf<(i32 imm), [{
283 int64_t v = (int64_t)N->getSExtValue();
287 def u6_0ImmPred : PatLeaf<(i32 imm), [{
288 int64_t v = (int64_t)N->getSExtValue();
292 def u6_1ImmPred : PatLeaf<(i32 imm), [{
293 int64_t v = (int64_t)N->getSExtValue();
294 return isShiftedUInt<6,1>(v);
297 def u6_2ImmPred : PatLeaf<(i32 imm), [{
298 int64_t v = (int64_t)N->getSExtValue();
299 return isShiftedUInt<6,2>(v);
302 def u6_3ImmPred : PatLeaf<(i32 imm), [{
303 int64_t v = (int64_t)N->getSExtValue();
304 return isShiftedUInt<6,3>(v);
307 def u5ImmPred : PatLeaf<(i32 imm), [{
308 int64_t v = (int64_t)N->getSExtValue();
312 def u4ImmPred : PatLeaf<(i32 imm), [{
313 int64_t v = (int64_t)N->getSExtValue();
317 def u3ImmPred : PatLeaf<(i32 imm), [{
318 int64_t v = (int64_t)N->getSExtValue();
322 def u2ImmPred : PatLeaf<(i32 imm), [{
323 int64_t v = (int64_t)N->getSExtValue();
327 def u1ImmPred : PatLeaf<(i1 imm), [{
328 int64_t v = (int64_t)N->getSExtValue();
332 def m5BImmPred : PatLeaf<(i32 imm), [{
333 // m5BImmPred predicate - True if the (char) number is in range -1 .. -31
334 // and will fit in a 5 bit field when made positive, for use in memops.
335 // this is specific to the zero extending of a negative by CombineInstr
336 int8_t v = (int8_t)N->getSExtValue();
337 return (-31 <= v && v <= -1);
340 def m5HImmPred : PatLeaf<(i32 imm), [{
341 // m5HImmPred predicate - True if the (short) number is in range -1 .. -31
342 // and will fit in a 5 bit field when made positive, for use in memops.
343 // this is specific to the zero extending of a negative by CombineInstr
344 int16_t v = (int16_t)N->getSExtValue();
345 return (-31 <= v && v <= -1);
348 def m5ImmPred : PatLeaf<(i32 imm), [{
349 // m5ImmPred predicate - True if the number is in range -1 .. -31
350 // and will fit in a 5 bit field when made positive, for use in memops.
351 int64_t v = (int64_t)N->getSExtValue();
352 return (-31 <= v && v <= -1);
355 //InN means negative integers in [-(2^N - 1), 0]
356 def n8ImmPred : PatLeaf<(i32 imm), [{
357 // n8ImmPred predicate - True if the immediate fits in a 8-bit signed
359 int64_t v = (int64_t)N->getSExtValue();
360 return (-255 <= v && v <= 0);
363 def nOneImmPred : PatLeaf<(i32 imm), [{
364 // nOneImmPred predicate - True if the immediate is -1.
365 int64_t v = (int64_t)N->getSExtValue();
369 def Set5ImmPred : PatLeaf<(i32 imm), [{
370 // Set5ImmPred predicate - True if the number is in the series of values.
371 // [ 2^0, 2^1, ... 2^31 ]
372 // For use in setbit immediate.
373 uint32_t v = (int32_t)N->getSExtValue();
374 // Constrain to 32 bits, and then check for single bit.
375 return ImmIsSingleBit(v);
378 def Clr5ImmPred : PatLeaf<(i32 imm), [{
379 // Clr5ImmPred predicate - True if the number is in the series of
380 // bit negated values.
381 // [ 2^0, 2^1, ... 2^31 ]
382 // For use in clrbit immediate.
383 // Note: we are bit NOTing the value.
384 uint32_t v = ~ (int32_t)N->getSExtValue();
385 // Constrain to 32 bits, and then check for single bit.
386 return ImmIsSingleBit(v);
389 def SetClr5ImmPred : PatLeaf<(i32 imm), [{
390 // SetClr5ImmPred predicate - True if the immediate is in range 0..31.
391 int32_t v = (int32_t)N->getSExtValue();
392 return (v >= 0 && v <= 31);
395 def Set4ImmPred : PatLeaf<(i32 imm), [{
396 // Set4ImmPred predicate - True if the number is in the series of values:
397 // [ 2^0, 2^1, ... 2^15 ].
398 // For use in setbit immediate.
399 uint16_t v = (int16_t)N->getSExtValue();
400 // Constrain to 16 bits, and then check for single bit.
401 return ImmIsSingleBit(v);
404 def Clr4ImmPred : PatLeaf<(i32 imm), [{
405 // Clr4ImmPred predicate - True if the number is in the series of
406 // bit negated values:
407 // [ 2^0, 2^1, ... 2^15 ].
408 // For use in setbit and clrbit immediate.
409 uint16_t v = ~ (int16_t)N->getSExtValue();
410 // Constrain to 16 bits, and then check for single bit.
411 return ImmIsSingleBit(v);
414 def SetClr4ImmPred : PatLeaf<(i32 imm), [{
415 // SetClr4ImmPred predicate - True if the immediate is in the range 0..15.
416 int16_t v = (int16_t)N->getSExtValue();
417 return (v >= 0 && v <= 15);
420 def Set3ImmPred : PatLeaf<(i32 imm), [{
421 // Set3ImmPred predicate - True if the number is in the series of values:
422 // [ 2^0, 2^1, ... 2^7 ].
423 // For use in setbit immediate.
424 uint8_t v = (int8_t)N->getSExtValue();
425 // Constrain to 8 bits, and then check for single bit.
426 return ImmIsSingleBit(v);
429 def Clr3ImmPred : PatLeaf<(i32 imm), [{
430 // Clr3ImmPred predicate - True if the number is in the series of
431 // bit negated values:
432 // [ 2^0, 2^1, ... 2^7 ].
433 // For use in setbit and clrbit immediate.
434 uint8_t v = ~ (int8_t)N->getSExtValue();
435 // Constrain to 8 bits, and then check for single bit.
436 return ImmIsSingleBit(v);
439 def SetClr3ImmPred : PatLeaf<(i32 imm), [{
440 // SetClr3ImmPred predicate - True if the immediate is in the range 0..7.
441 int8_t v = (int8_t)N->getSExtValue();
442 return (v >= 0 && v <= 7);
446 // Extendable immediate operands.
448 let PrintMethod = "printExtOperand" in {
449 def s16Ext : Operand<i32>;
450 def s12Ext : Operand<i32>;
451 def s10Ext : Operand<i32>;
452 def s9Ext : Operand<i32>;
453 def s8Ext : Operand<i32>;
454 def s7Ext : Operand<i32>;
455 def s6Ext : Operand<i32>;
456 def s11_0Ext : Operand<i32>;
457 def s11_1Ext : Operand<i32>;
458 def s11_2Ext : Operand<i32>;
459 def s11_3Ext : Operand<i32>;
460 def u6Ext : Operand<i32>;
461 def u7Ext : Operand<i32>;
462 def u8Ext : Operand<i32>;
463 def u9Ext : Operand<i32>;
464 def u10Ext : Operand<i32>;
465 def u6_0Ext : Operand<i32>;
466 def u6_1Ext : Operand<i32>;
467 def u6_2Ext : Operand<i32>;
468 def u6_3Ext : Operand<i32>;
472 // This complex pattern exists only to create a machine instruction operand
473 // of type "frame index". There doesn't seem to be a way to do that directly
475 def AddrFI : ComplexPattern<i32, 1, "SelectAddrFI", [frameindex], []>;
477 // These complex patterns are not strictly necessary, since global address
478 // folding will happen during DAG combining. For distinguishing between GA
479 // and GP, pat frags with HexagonCONST32 and HexagonCONST32_GP can be used.
480 def AddrGA : ComplexPattern<i32, 1, "SelectAddrGA", [], []>;
481 def AddrGP : ComplexPattern<i32, 1, "SelectAddrGP", [], []>;
485 let PrintMethod = "printGlobalOperand" in {
486 def globaladdress : Operand<i32>;
487 def globaladdressExt : Operand<i32>;
490 let PrintMethod = "printJumpTable" in
491 def jumptablebase : Operand<i32>;
493 def brtarget : Operand<OtherVT>;
494 def brtargetExt : Operand<OtherVT> {
495 let PrintMethod = "printExtBrtarget";
497 def calltarget : Operand<i32>;
499 def bblabel : Operand<i32>;
500 def bbl : SDNode<"ISD::BasicBlock", SDTPtrLeaf , [], "BasicBlockSDNode">;
502 def symbolHi32 : Operand<i32> {
503 let PrintMethod = "printSymbolHi";
505 def symbolLo32 : Operand<i32> {
506 let PrintMethod = "printSymbolLo";
509 // Return true if for a 32 to 64-bit sign-extended load.
510 def is_sext_i32 : PatLeaf<(i64 DoubleRegs:$src1), [{
511 LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
514 return LD->getExtensionType() == ISD::SEXTLOAD &&
515 LD->getMemoryVT().getScalarType() == MVT::i32;