1 //===- HexagonImmediates.td - Hexagon immediate processing -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illnois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 def s32ImmOperand : AsmOperandClass { let Name = "s32Imm"; }
11 def s8ImmOperand : AsmOperandClass { let Name = "s8Imm"; }
12 def s8Imm64Operand : AsmOperandClass { let Name = "s8Imm64"; }
13 def s6ImmOperand : AsmOperandClass { let Name = "s6Imm"; }
14 def s4ImmOperand : AsmOperandClass { let Name = "s4Imm"; }
15 def s4_0ImmOperand : AsmOperandClass { let Name = "s4_0Imm"; }
16 def s4_1ImmOperand : AsmOperandClass { let Name = "s4_1Imm"; }
17 def s4_2ImmOperand : AsmOperandClass { let Name = "s4_2Imm"; }
18 def s4_3ImmOperand : AsmOperandClass { let Name = "s4_3Imm"; }
19 def s4_6ImmOperand : AsmOperandClass { let Name = "s4_6Imm"; }
20 def s3_6ImmOperand : AsmOperandClass { let Name = "s3_6Imm"; }
21 def u64ImmOperand : AsmOperandClass { let Name = "u64Imm"; }
22 def u32ImmOperand : AsmOperandClass { let Name = "u32Imm"; }
23 def u26_6ImmOperand : AsmOperandClass { let Name = "u26_6Imm"; }
24 def u16ImmOperand : AsmOperandClass { let Name = "u16Imm"; }
25 def u16_0ImmOperand : AsmOperandClass { let Name = "u16_0Imm"; }
26 def u16_1ImmOperand : AsmOperandClass { let Name = "u16_1Imm"; }
27 def u16_2ImmOperand : AsmOperandClass { let Name = "u16_2Imm"; }
28 def u16_3ImmOperand : AsmOperandClass { let Name = "u16_3Imm"; }
29 def u11_3ImmOperand : AsmOperandClass { let Name = "u11_3Imm"; }
30 def u10ImmOperand : AsmOperandClass { let Name = "u10Imm"; }
31 def u9ImmOperand : AsmOperandClass { let Name = "u9Imm"; }
32 def u8ImmOperand : AsmOperandClass { let Name = "u8Imm"; }
33 def u7ImmOperand : AsmOperandClass { let Name = "u7Imm"; }
34 def u6ImmOperand : AsmOperandClass { let Name = "u6Imm"; }
35 def u6_0ImmOperand : AsmOperandClass { let Name = "u6_0Imm"; }
36 def u6_1ImmOperand : AsmOperandClass { let Name = "u6_1Imm"; }
37 def u6_2ImmOperand : AsmOperandClass { let Name = "u6_2Imm"; }
38 def u6_3ImmOperand : AsmOperandClass { let Name = "u6_3Imm"; }
39 def u5ImmOperand : AsmOperandClass { let Name = "u5Imm"; }
40 def u4ImmOperand : AsmOperandClass { let Name = "u4Imm"; }
41 def u3ImmOperand : AsmOperandClass { let Name = "u3Imm"; }
42 def u2ImmOperand : AsmOperandClass { let Name = "u2Imm"; }
43 def u1ImmOperand : AsmOperandClass { let Name = "u1Imm"; }
44 def n8ImmOperand : AsmOperandClass { let Name = "n8Imm"; }
45 // Immediate operands.
47 let OperandType = "OPERAND_IMMEDIATE",
48 DecoderMethod = "unsignedImmDecoder" in {
49 def s32Imm : Operand<i32> { let ParserMatchClass = s32ImmOperand;
50 let DecoderMethod = "s32ImmDecoder"; }
51 def s8Imm : Operand<i32> { let ParserMatchClass = s8ImmOperand;
52 let DecoderMethod = "s8ImmDecoder"; }
53 def s8Imm64 : Operand<i64> { let ParserMatchClass = s8Imm64Operand;
54 let DecoderMethod = "s8ImmDecoder"; }
55 def s6Imm : Operand<i32> { let ParserMatchClass = s6ImmOperand;
56 let DecoderMethod = "s6_0ImmDecoder"; }
57 def s6_3Imm : Operand<i32>;
58 def s4Imm : Operand<i32> { let ParserMatchClass = s4ImmOperand;
59 let DecoderMethod = "s4_0ImmDecoder"; }
60 def s4_0Imm : Operand<i32> { let ParserMatchClass = s4_0ImmOperand;
61 let DecoderMethod = "s4_0ImmDecoder"; }
62 def s4_1Imm : Operand<i32> { let ParserMatchClass = s4_1ImmOperand;
63 let DecoderMethod = "s4_1ImmDecoder"; }
64 def s4_2Imm : Operand<i32> { let ParserMatchClass = s4_2ImmOperand;
65 let DecoderMethod = "s4_2ImmDecoder"; }
66 def s4_3Imm : Operand<i32> { let ParserMatchClass = s4_3ImmOperand;
67 let DecoderMethod = "s4_3ImmDecoder"; }
68 def u64Imm : Operand<i64> { let ParserMatchClass = u64ImmOperand; }
69 def u32Imm : Operand<i32> { let ParserMatchClass = u32ImmOperand; }
70 def u26_6Imm : Operand<i32> { let ParserMatchClass = u26_6ImmOperand; }
71 def u16Imm : Operand<i32> { let ParserMatchClass = u16ImmOperand; }
72 def u16_0Imm : Operand<i32> { let ParserMatchClass = u16_0ImmOperand; }
73 def u16_1Imm : Operand<i32> { let ParserMatchClass = u16_1ImmOperand; }
74 def u16_2Imm : Operand<i32> { let ParserMatchClass = u16_2ImmOperand; }
75 def u16_3Imm : Operand<i32> { let ParserMatchClass = u16_3ImmOperand; }
76 def u11_3Imm : Operand<i32> { let ParserMatchClass = u11_3ImmOperand; }
77 def u10Imm : Operand<i32> { let ParserMatchClass = u10ImmOperand; }
78 def u9Imm : Operand<i32> { let ParserMatchClass = u9ImmOperand; }
79 def u8Imm : Operand<i32> { let ParserMatchClass = u8ImmOperand; }
80 def u7Imm : Operand<i32> { let ParserMatchClass = u7ImmOperand; }
81 def u6Imm : Operand<i32> { let ParserMatchClass = u6ImmOperand; }
82 def u6_0Imm : Operand<i32> { let ParserMatchClass = u6_0ImmOperand; }
83 def u6_1Imm : Operand<i32> { let ParserMatchClass = u6_1ImmOperand; }
84 def u6_2Imm : Operand<i32> { let ParserMatchClass = u6_2ImmOperand; }
85 def u6_3Imm : Operand<i32> { let ParserMatchClass = u6_3ImmOperand; }
86 def u5Imm : Operand<i32> { let ParserMatchClass = u5ImmOperand; }
87 def u5_0Imm : Operand<i32>;
88 def u5_1Imm : Operand<i32>;
89 def u5_2Imm : Operand<i32>;
90 def u5_3Imm : Operand<i32>;
91 def u4Imm : Operand<i32> { let ParserMatchClass = u4ImmOperand; }
92 def u4_0Imm : Operand<i32>;
93 def u4_1Imm : Operand<i32>;
94 def u4_2Imm : Operand<i32>;
95 def u4_3Imm : Operand<i32>;
96 def u3Imm : Operand<i32> { let ParserMatchClass = u3ImmOperand; }
97 def u3_0Imm : Operand<i32>;
98 def u3_1Imm : Operand<i32>;
99 def u3_2Imm : Operand<i32>;
100 def u3_3Imm : Operand<i32>;
101 def u2Imm : Operand<i32> { let ParserMatchClass = u2ImmOperand; }
102 def u1Imm : Operand<i32> { let ParserMatchClass = u1ImmOperand; }
103 def n8Imm : Operand<i32> { let ParserMatchClass = n8ImmOperand; }
106 let OperandType = "OPERAND_IMMEDIATE" in {
107 def s4_6Imm : Operand<i32> { let ParserMatchClass = s4_6ImmOperand;
108 let PrintMethod = "prints4_6ImmOperand";
109 let DecoderMethod = "s4_6ImmDecoder";}
110 def s4_7Imm : Operand<i32> { let PrintMethod = "prints4_7ImmOperand";
111 let DecoderMethod = "s4_6ImmDecoder";}
112 def s3_6Imm : Operand<i32> { let ParserMatchClass = s3_6ImmOperand;
113 let PrintMethod = "prints3_6ImmOperand";
114 let DecoderMethod = "s3_6ImmDecoder";}
115 def s3_7Imm : Operand<i32> { let PrintMethod = "prints3_7ImmOperand";
116 let DecoderMethod = "s3_6ImmDecoder";}
120 // Immediate predicates
122 def s32ImmPred : PatLeaf<(i32 imm), [{
123 int64_t v = (int64_t)N->getSExtValue();
127 def s32_0ImmPred : PatLeaf<(i32 imm), [{
128 int64_t v = (int64_t)N->getSExtValue();
132 def s31_1ImmPred : PatLeaf<(i32 imm), [{
133 int64_t v = (int64_t)N->getSExtValue();
134 return isShiftedInt<31,1>(v);
137 def s30_2ImmPred : PatLeaf<(i32 imm), [{
138 int64_t v = (int64_t)N->getSExtValue();
139 return isShiftedInt<30,2>(v);
142 def s29_3ImmPred : PatLeaf<(i32 imm), [{
143 int64_t v = (int64_t)N->getSExtValue();
144 return isShiftedInt<29,3>(v);
147 def s16ImmPred : PatLeaf<(i32 imm), [{
148 int64_t v = (int64_t)N->getSExtValue();
152 def s11_0ImmPred : PatLeaf<(i32 imm), [{
153 int64_t v = (int64_t)N->getSExtValue();
157 def s11_1ImmPred : PatLeaf<(i32 imm), [{
158 int64_t v = (int64_t)N->getSExtValue();
159 return isShiftedInt<11,1>(v);
162 def s11_2ImmPred : PatLeaf<(i32 imm), [{
163 int64_t v = (int64_t)N->getSExtValue();
164 return isShiftedInt<11,2>(v);
167 def s11_3ImmPred : PatLeaf<(i32 imm), [{
168 int64_t v = (int64_t)N->getSExtValue();
169 return isShiftedInt<11,3>(v);
172 def s10ImmPred : PatLeaf<(i32 imm), [{
173 int64_t v = (int64_t)N->getSExtValue();
177 def s8ImmPred : PatLeaf<(i32 imm), [{
178 int64_t v = (int64_t)N->getSExtValue();
182 def s8Imm64Pred : PatLeaf<(i64 imm), [{
183 int64_t v = (int64_t)N->getSExtValue();
187 def s6ImmPred : PatLeaf<(i32 imm), [{
188 int64_t v = (int64_t)N->getSExtValue();
192 def s4_0ImmPred : PatLeaf<(i32 imm), [{
193 int64_t v = (int64_t)N->getSExtValue();
197 def s4_1ImmPred : PatLeaf<(i32 imm), [{
198 int64_t v = (int64_t)N->getSExtValue();
199 return isShiftedInt<4,1>(v);
202 def s4_2ImmPred : PatLeaf<(i32 imm), [{
203 int64_t v = (int64_t)N->getSExtValue();
204 return isShiftedInt<4,2>(v);
207 def s4_3ImmPred : PatLeaf<(i32 imm), [{
208 int64_t v = (int64_t)N->getSExtValue();
209 return isShiftedInt<4,3>(v);
212 def u64ImmPred : PatLeaf<(i64 imm), [{
213 // Adding "N ||" to suppress gcc unused warning.
217 def u32ImmPred : PatLeaf<(i32 imm), [{
218 int64_t v = (int64_t)N->getSExtValue();
219 return isUInt<32>(v);
222 def u32_0ImmPred : PatLeaf<(i32 imm), [{
223 int64_t v = (int64_t)N->getSExtValue();
224 return isUInt<32>(v);
227 def u31_1ImmPred : PatLeaf<(i32 imm), [{
228 int64_t v = (int64_t)N->getSExtValue();
229 return isShiftedUInt<31,1>(v);
232 def u30_2ImmPred : PatLeaf<(i32 imm), [{
233 int64_t v = (int64_t)N->getSExtValue();
234 return isShiftedUInt<30,2>(v);
237 def u29_3ImmPred : PatLeaf<(i32 imm), [{
238 int64_t v = (int64_t)N->getSExtValue();
239 return isShiftedUInt<29,3>(v);
242 def u26_6ImmPred : PatLeaf<(i32 imm), [{
243 int64_t v = (int64_t)N->getSExtValue();
244 return isShiftedUInt<26,6>(v);
247 def u16_0ImmPred : PatLeaf<(i32 imm), [{
248 int64_t v = (int64_t)N->getSExtValue();
249 return isUInt<16>(v);
252 def u16_1ImmPred : PatLeaf<(i32 imm), [{
253 int64_t v = (int64_t)N->getSExtValue();
254 return isShiftedUInt<16,1>(v);
257 def u16_2ImmPred : PatLeaf<(i32 imm), [{
258 int64_t v = (int64_t)N->getSExtValue();
259 return isShiftedUInt<16,2>(v);
262 def u11_3ImmPred : PatLeaf<(i32 imm), [{
263 int64_t v = (int64_t)N->getSExtValue();
264 return isShiftedUInt<11,3>(v);
267 def u10ImmPred : PatLeaf<(i32 imm), [{
268 int64_t v = (int64_t)N->getSExtValue();
269 return isUInt<10>(v);
272 def u9ImmPred : PatLeaf<(i32 imm), [{
273 int64_t v = (int64_t)N->getSExtValue();
277 def u8ImmPred : PatLeaf<(i32 imm), [{
278 int64_t v = (int64_t)N->getSExtValue();
282 def u7StrictPosImmPred : ImmLeaf<i32, [{
283 // u7StrictPosImmPred predicate - True if the immediate fits in an 7-bit
284 // unsigned field and is strictly greater than 0.
285 return isUInt<7>(Imm) && Imm > 0;
288 def u7ImmPred : PatLeaf<(i32 imm), [{
289 int64_t v = (int64_t)N->getSExtValue();
293 def u6ImmPred : PatLeaf<(i32 imm), [{
294 int64_t v = (int64_t)N->getSExtValue();
298 def u6_0ImmPred : PatLeaf<(i32 imm), [{
299 int64_t v = (int64_t)N->getSExtValue();
303 def u6_1ImmPred : PatLeaf<(i32 imm), [{
304 int64_t v = (int64_t)N->getSExtValue();
305 return isShiftedUInt<6,1>(v);
308 def u6_2ImmPred : PatLeaf<(i32 imm), [{
309 int64_t v = (int64_t)N->getSExtValue();
310 return isShiftedUInt<6,2>(v);
313 def u6_3ImmPred : PatLeaf<(i32 imm), [{
314 int64_t v = (int64_t)N->getSExtValue();
315 return isShiftedUInt<6,3>(v);
318 def u5ImmPred : PatLeaf<(i32 imm), [{
319 int64_t v = (int64_t)N->getSExtValue();
323 def u4ImmPred : PatLeaf<(i32 imm), [{
324 int64_t v = (int64_t)N->getSExtValue();
328 def u3ImmPred : PatLeaf<(i32 imm), [{
329 int64_t v = (int64_t)N->getSExtValue();
333 def u2ImmPred : PatLeaf<(i32 imm), [{
334 int64_t v = (int64_t)N->getSExtValue();
338 def u1ImmPred : PatLeaf<(i1 imm), [{
339 int64_t v = (int64_t)N->getSExtValue();
343 def u1ImmPred32 : PatLeaf<(i32 imm), [{
344 int64_t v = (int64_t)N->getSExtValue();
348 def m5BImmPred : PatLeaf<(i32 imm), [{
349 // m5BImmPred predicate - True if the (char) number is in range -1 .. -31
350 // and will fit in a 5 bit field when made positive, for use in memops.
351 // this is specific to the zero extending of a negative by CombineInstr
352 int8_t v = (int8_t)N->getSExtValue();
353 return (-31 <= v && v <= -1);
356 def m5HImmPred : PatLeaf<(i32 imm), [{
357 // m5HImmPred predicate - True if the (short) number is in range -1 .. -31
358 // and will fit in a 5 bit field when made positive, for use in memops.
359 // this is specific to the zero extending of a negative by CombineInstr
360 int16_t v = (int16_t)N->getSExtValue();
361 return (-31 <= v && v <= -1);
364 def m5ImmPred : PatLeaf<(i32 imm), [{
365 // m5ImmPred predicate - True if the number is in range -1 .. -31
366 // and will fit in a 5 bit field when made positive, for use in memops.
367 int64_t v = (int64_t)N->getSExtValue();
368 return (-31 <= v && v <= -1);
371 //InN means negative integers in [-(2^N - 1), 0]
372 def n8ImmPred : PatLeaf<(i32 imm), [{
373 // n8ImmPred predicate - True if the immediate fits in a 8-bit signed
375 int64_t v = (int64_t)N->getSExtValue();
376 return (-255 <= v && v <= 0);
379 def nOneImmPred : PatLeaf<(i32 imm), [{
380 // nOneImmPred predicate - True if the immediate is -1.
381 int64_t v = (int64_t)N->getSExtValue();
385 def Set5ImmPred : PatLeaf<(i32 imm), [{
386 // Set5ImmPred predicate - True if the number is in the series of values.
387 // [ 2^0, 2^1, ... 2^31 ]
388 // For use in setbit immediate.
389 uint32_t v = (int32_t)N->getSExtValue();
390 // Constrain to 32 bits, and then check for single bit.
391 return ImmIsSingleBit(v);
394 def Clr5ImmPred : PatLeaf<(i32 imm), [{
395 // Clr5ImmPred predicate - True if the number is in the series of
396 // bit negated values.
397 // [ 2^0, 2^1, ... 2^31 ]
398 // For use in clrbit immediate.
399 // Note: we are bit NOTing the value.
400 uint32_t v = ~ (int32_t)N->getSExtValue();
401 // Constrain to 32 bits, and then check for single bit.
402 return ImmIsSingleBit(v);
405 def SetClr5ImmPred : PatLeaf<(i32 imm), [{
406 // True if the immediate is in range 0..31.
407 int32_t v = (int32_t)N->getSExtValue();
408 return (v >= 0 && v <= 31);
411 def Set4ImmPred : PatLeaf<(i32 imm), [{
412 // Set4ImmPred predicate - True if the number is in the series of values:
413 // [ 2^0, 2^1, ... 2^15 ].
414 // For use in setbit immediate.
415 uint16_t v = (int16_t)N->getSExtValue();
416 // Constrain to 16 bits, and then check for single bit.
417 return ImmIsSingleBit(v);
420 def Clr4ImmPred : PatLeaf<(i32 imm), [{
421 // Clr4ImmPred predicate - True if the number is in the series of
422 // bit negated values:
423 // [ 2^0, 2^1, ... 2^15 ].
424 // For use in setbit and clrbit immediate.
425 uint16_t v = ~ (int16_t)N->getSExtValue();
426 // Constrain to 16 bits, and then check for single bit.
427 return ImmIsSingleBit(v);
430 def SetClr4ImmPred : PatLeaf<(i32 imm), [{
431 // True if the immediate is in the range 0..15.
432 int16_t v = (int16_t)N->getSExtValue();
433 return (v >= 0 && v <= 15);
436 def Set3ImmPred : PatLeaf<(i32 imm), [{
437 // True if the number is in the series of values: [ 2^0, 2^1, ... 2^7 ].
438 // For use in setbit immediate.
439 uint8_t v = (int8_t)N->getSExtValue();
440 // Constrain to 8 bits, and then check for single bit.
441 return ImmIsSingleBit(v);
444 def Clr3ImmPred : PatLeaf<(i32 imm), [{
445 // True if the number is in the series of bit negated values: [ 2^0, 2^1, ... 2^7 ].
446 // For use in setbit and clrbit immediate.
447 uint8_t v = ~ (int8_t)N->getSExtValue();
448 // Constrain to 8 bits, and then check for single bit.
449 return ImmIsSingleBit(v);
452 def SetClr3ImmPred : PatLeaf<(i32 imm), [{
453 // True if the immediate is in the range 0..7.
454 int8_t v = (int8_t)N->getSExtValue();
455 return (v >= 0 && v <= 7);
459 // Extendable immediate operands.
460 def f32ExtOperand : AsmOperandClass { let Name = "f32Ext"; }
461 def s16ExtOperand : AsmOperandClass { let Name = "s16Ext"; }
462 def s12ExtOperand : AsmOperandClass { let Name = "s12Ext"; }
463 def s10ExtOperand : AsmOperandClass { let Name = "s10Ext"; }
464 def s9ExtOperand : AsmOperandClass { let Name = "s9Ext"; }
465 def s8ExtOperand : AsmOperandClass { let Name = "s8Ext"; }
466 def s7ExtOperand : AsmOperandClass { let Name = "s7Ext"; }
467 def s6ExtOperand : AsmOperandClass { let Name = "s6Ext"; }
468 def s11_0ExtOperand : AsmOperandClass { let Name = "s11_0Ext"; }
469 def s11_1ExtOperand : AsmOperandClass { let Name = "s11_1Ext"; }
470 def s11_2ExtOperand : AsmOperandClass { let Name = "s11_2Ext"; }
471 def s11_3ExtOperand : AsmOperandClass { let Name = "s11_3Ext"; }
472 def u6ExtOperand : AsmOperandClass { let Name = "u6Ext"; }
473 def u7ExtOperand : AsmOperandClass { let Name = "u7Ext"; }
474 def u8ExtOperand : AsmOperandClass { let Name = "u8Ext"; }
475 def u9ExtOperand : AsmOperandClass { let Name = "u9Ext"; }
476 def u10ExtOperand : AsmOperandClass { let Name = "u10Ext"; }
477 def u6_0ExtOperand : AsmOperandClass { let Name = "u6_0Ext"; }
478 def u6_1ExtOperand : AsmOperandClass { let Name = "u6_1Ext"; }
479 def u6_2ExtOperand : AsmOperandClass { let Name = "u6_2Ext"; }
480 def u6_3ExtOperand : AsmOperandClass { let Name = "u6_3Ext"; }
481 def u32MustExtOperand : AsmOperandClass { let Name = "u32MustExt"; }
485 let OperandType = "OPERAND_IMMEDIATE", PrintMethod = "printExtOperand",
486 DecoderMethod = "unsignedImmDecoder" in {
487 def f32Ext : Operand<f32> { let ParserMatchClass = f32ExtOperand; }
488 def s16Ext : Operand<i32> { let ParserMatchClass = s16ExtOperand;
489 let DecoderMethod = "s16ImmDecoder"; }
490 def s12Ext : Operand<i32> { let ParserMatchClass = s12ExtOperand;
491 let DecoderMethod = "s12ImmDecoder"; }
492 def s11_0Ext : Operand<i32> { let ParserMatchClass = s11_0ExtOperand;
493 let DecoderMethod = "s11_0ImmDecoder"; }
494 def s11_1Ext : Operand<i32> { let ParserMatchClass = s11_1ExtOperand;
495 let DecoderMethod = "s11_1ImmDecoder"; }
496 def s11_2Ext : Operand<i32> { let ParserMatchClass = s11_2ExtOperand;
497 let DecoderMethod = "s11_2ImmDecoder"; }
498 def s11_3Ext : Operand<i32> { let ParserMatchClass = s11_3ExtOperand;
499 let DecoderMethod = "s11_3ImmDecoder"; }
500 def s10Ext : Operand<i32> { let ParserMatchClass = s10ExtOperand;
501 let DecoderMethod = "s10ImmDecoder"; }
502 def s9Ext : Operand<i32> { let ParserMatchClass = s9ExtOperand;
503 let DecoderMethod = "s90ImmDecoder"; }
504 def s8Ext : Operand<i32> { let ParserMatchClass = s8ExtOperand;
505 let DecoderMethod = "s8ImmDecoder"; }
506 def s7Ext : Operand<i32> { let ParserMatchClass = s7ExtOperand; }
507 def s6Ext : Operand<i32> { let ParserMatchClass = s6ExtOperand;
508 let DecoderMethod = "s6_0ImmDecoder"; }
509 def u6Ext : Operand<i32> { let ParserMatchClass = u6ExtOperand; }
510 def u7Ext : Operand<i32> { let ParserMatchClass = u7ExtOperand; }
511 def u8Ext : Operand<i32> { let ParserMatchClass = u8ExtOperand; }
512 def u9Ext : Operand<i32> { let ParserMatchClass = u9ExtOperand; }
513 def u10Ext : Operand<i32> { let ParserMatchClass = u10ExtOperand; }
514 def u6_0Ext : Operand<i32> { let ParserMatchClass = u6_0ExtOperand; }
515 def u6_1Ext : Operand<i32> { let ParserMatchClass = u6_1ExtOperand; }
516 def u6_2Ext : Operand<i32> { let ParserMatchClass = u6_2ExtOperand; }
517 def u6_3Ext : Operand<i32> { let ParserMatchClass = u6_3ExtOperand; }
518 def u32MustExt : Operand<i32> { let ParserMatchClass = u32MustExtOperand; }
522 def s4_7ImmPred : PatLeaf<(i32 imm), [{
523 int64_t v = (int64_t)N->getSExtValue();
524 if (HST->hasV60TOps())
525 // Return true if the immediate can fit in a 10-bit sign extended field and
526 // is 128-byte aligned.
527 return isShiftedInt<4,7>(v);
531 def s3_7ImmPred : PatLeaf<(i32 imm), [{
532 int64_t v = (int64_t)N->getSExtValue();
533 if (HST->hasV60TOps())
534 // Return true if the immediate can fit in a 9-bit sign extended field and
535 // is 128-byte aligned.
536 return isShiftedInt<3,7>(v);
540 def s4_6ImmPred : PatLeaf<(i32 imm), [{
541 int64_t v = (int64_t)N->getSExtValue();
542 if (HST->hasV60TOps())
543 // Return true if the immediate can fit in a 10-bit sign extended field and
544 // is 64-byte aligned.
545 return isShiftedInt<4,6>(v);
549 def s3_6ImmPred : PatLeaf<(i32 imm), [{
550 int64_t v = (int64_t)N->getSExtValue();
551 if (HST->hasV60TOps())
552 // Return true if the immediate can fit in a 9-bit sign extended field and
553 // is 64-byte aligned.
554 return isShiftedInt<3,6>(v);
559 // This complex pattern exists only to create a machine instruction operand
560 // of type "frame index". There doesn't seem to be a way to do that directly
562 def AddrFI : ComplexPattern<i32, 1, "SelectAddrFI", [frameindex], []>;
564 // These complex patterns are not strictly necessary, since global address
565 // folding will happen during DAG combining. For distinguishing between GA
566 // and GP, pat frags with HexagonCONST32 and HexagonCONST32_GP can be used.
567 def AddrGA : ComplexPattern<i32, 1, "SelectAddrGA", [], []>;
568 def AddrGP : ComplexPattern<i32, 1, "SelectAddrGP", [], []>;
572 let PrintMethod = "printGlobalOperand" in {
573 def globaladdress : Operand<i32>;
574 def globaladdressExt : Operand<i32>;
577 let PrintMethod = "printJumpTable" in
578 def jumptablebase : Operand<i32>;
580 def brtarget : Operand<OtherVT> {
581 let DecoderMethod = "brtargetDecoder";
582 let PrintMethod = "printBrtarget";
584 def brtargetExt : Operand<OtherVT> {
585 let DecoderMethod = "brtargetDecoder";
586 let PrintMethod = "printBrtarget";
588 def calltarget : Operand<i32> {
589 let DecoderMethod = "brtargetDecoder";
590 let PrintMethod = "printBrtarget";
593 def bblabel : Operand<i32>;
594 def bbl : SDNode<"ISD::BasicBlock", SDTPtrLeaf, [], "BasicBlockSDNode">;
596 // Return true if for a 32 to 64-bit sign-extended load.
597 def is_sext_i32 : PatLeaf<(i64 DoubleRegs:$src1), [{
598 LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
601 return LD->getExtensionType() == ISD::SEXTLOAD &&
602 LD->getMemoryVT().getScalarType() == MVT::i32;