1 //===- HexagonSchedule.td - Hexagon Scheduling Definitions -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 def LSUNIT : FuncUnit; // SLOT0
12 def LUNIT : FuncUnit; // SLOT1
13 def MUNIT : FuncUnit; // SLOT2
14 def SUNIT : FuncUnit; // SLOT3
15 def LOOPUNIT : FuncUnit;
18 def ALU32 : InstrItinClass;
19 def ALU64 : InstrItinClass;
20 def CR : InstrItinClass;
21 def J : InstrItinClass;
22 def JR : InstrItinClass;
23 def LD : InstrItinClass;
24 def LD0 : InstrItinClass;
25 def M : InstrItinClass;
26 def ST : InstrItinClass;
27 def ST0 : InstrItinClass;
28 def S : InstrItinClass;
29 def SYS : InstrItinClass;
30 def ENDLOOP : InstrItinClass;
31 def PSEUDO : InstrItinClass;
32 def PSEUDOM : InstrItinClass;
34 def HexagonItineraries :
35 ProcessorItineraries<[LSUNIT, LUNIT, MUNIT, SUNIT, LOOPUNIT], [], [
36 InstrItinData<ALU32 , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>,
37 InstrItinData<ALU64 , [InstrStage<1, [MUNIT, SUNIT]>]>,
38 InstrItinData<CR , [InstrStage<1, [SUNIT]>]>,
39 InstrItinData<J , [InstrStage<1, [SUNIT, MUNIT]>]>,
40 InstrItinData<JR , [InstrStage<1, [MUNIT]>]>,
41 InstrItinData<LD , [InstrStage<1, [LUNIT, LSUNIT]>]>,
42 InstrItinData<LD0 , [InstrStage<1, [LSUNIT]>]>,
43 InstrItinData<M , [InstrStage<1, [MUNIT, SUNIT]>]>,
44 InstrItinData<ST , [InstrStage<1, [LSUNIT]>]>,
45 InstrItinData<ST0 , [InstrStage<1, [LSUNIT]>]>,
46 InstrItinData<S , [InstrStage<1, [SUNIT, MUNIT]>]>,
47 InstrItinData<SYS , [InstrStage<1, [LSUNIT]>]>,
48 InstrItinData<ENDLOOP, [InstrStage<1, [LOOPUNIT]>]>,
49 InstrItinData<PSEUDO , [InstrStage<1, [LUNIT, LSUNIT, MUNIT, SUNIT]>]>,
50 InstrItinData<PSEUDOM, [InstrStage<1, [MUNIT, SUNIT], 0>,
51 InstrStage<1, [MUNIT, SUNIT]>]>
54 def HexagonModel : SchedMachineModel {
55 // Max issue per cycle == bundle width.
57 let Itineraries = HexagonItineraries;
61 //===----------------------------------------------------------------------===//
63 //===----------------------------------------------------------------------===//
65 include "HexagonScheduleV4.td"
67 //===----------------------------------------------------------------------===//
69 //===----------------------------------------------------------------------===//