1 //===-- HexagonMCCodeEmitter.h - Hexagon Target Descriptions ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief Definition for classes that emit Hexagon machine code from MCInsts
13 //===----------------------------------------------------------------------===//
15 #ifndef HEXAGONMCCODEEMITTER_H
16 #define HEXAGONMCCODEEMITTER_H
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInst.h"
21 #include "llvm/MC/MCInstrInfo.h"
22 #include "llvm/MC/MCRegisterInfo.h"
23 #include "llvm/MC/MCSubtargetInfo.h"
24 #include "llvm/Support/raw_ostream.h"
28 class HexagonMCCodeEmitter : public MCCodeEmitter {
29 MCSubtargetInfo const &MST;
33 HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCSubtargetInfo const &aMST,
36 MCSubtargetInfo const &getSubtargetInfo() const;
38 void EncodeInstruction(MCInst const &MI, raw_ostream &OS,
39 SmallVectorImpl<MCFixup> &Fixups,
40 MCSubtargetInfo const &STI) const override;
42 // \brief TableGen'erated function for getting the
43 // binary encoding for an instruction.
44 uint64_t getBinaryCodeForInstr(MCInst const &MI,
45 SmallVectorImpl<MCFixup> &Fixups,
46 MCSubtargetInfo const &STI) const;
48 /// \brief Return binary encoding of operand.
49 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
50 SmallVectorImpl<MCFixup> &Fixups,
51 MCSubtargetInfo const &STI) const;
54 HexagonMCCodeEmitter(HexagonMCCodeEmitter const &) LLVM_DELETED_FUNCTION;
55 void operator=(HexagonMCCodeEmitter const &) LLVM_DELETED_FUNCTION;
56 }; // class HexagonMCCodeEmitter
60 #endif /* HEXAGONMCCODEEMITTER_H */