1 //===- IA64InstrInfo.h - IA64 Instruction Information ----------*- C++ -*- ===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the IA64 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef IA64INSTRUCTIONINFO_H
15 #define IA64INSTRUCTIONINFO_H
17 #include "llvm/Target/TargetInstrInfo.h"
18 #include "IA64RegisterInfo.h"
22 class IA64InstrInfo : public TargetInstrInfoImpl {
23 const IA64RegisterInfo RI;
27 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
28 /// such, whenever a client has an instance of instruction info, it should
29 /// always be able to get register info as well (through this method).
31 virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
34 // Return true if the instruction is a register to register move and
35 // leave the source and dest operands in the passed parameters.
37 virtual bool isMoveInstr(const MachineInstr& MI,
39 unsigned& destReg) const;
40 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
41 MachineBasicBlock *FBB,
42 const std::vector<MachineOperand> &Cond) const;
43 virtual void copyRegToReg(MachineBasicBlock &MBB,
44 MachineBasicBlock::iterator MI,
45 unsigned DestReg, unsigned SrcReg,
46 const TargetRegisterClass *DestRC,
47 const TargetRegisterClass *SrcRC) const;
48 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
49 MachineBasicBlock::iterator MI,
50 unsigned SrcReg, bool isKill, int FrameIndex,
51 const TargetRegisterClass *RC) const;
53 virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
54 SmallVectorImpl<MachineOperand> &Addr,
55 const TargetRegisterClass *RC,
56 SmallVectorImpl<MachineInstr*> &NewMIs) const;
58 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
59 MachineBasicBlock::iterator MI,
60 unsigned DestReg, int FrameIndex,
61 const TargetRegisterClass *RC) const;
63 virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
64 SmallVectorImpl<MachineOperand> &Addr,
65 const TargetRegisterClass *RC,
66 SmallVectorImpl<MachineInstr*> &NewMIs) const;
69 } // End llvm namespace