Change instruction description to split OperandList into OutOperandList and
[oota-llvm.git] / lib / Target / IA64 / IA64RegisterInfo.h
1 //===- IA64RegisterInfo.h - IA64 Register Information Impl ------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file was developed by Duraid Madina and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the IA64 implementation of the MRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #ifndef IA64REGISTERINFO_H
15 #define IA64REGISTERINFO_H
16
17 #include "llvm/Target/MRegisterInfo.h"
18 #include "IA64GenRegisterInfo.h.inc"
19
20 namespace llvm { class llvm::Type; }
21
22 namespace llvm {
23
24 class TargetInstrInfo;
25
26 struct IA64RegisterInfo : public IA64GenRegisterInfo {
27   const TargetInstrInfo &TII;
28
29   IA64RegisterInfo(const TargetInstrInfo &tii);
30
31   /// Code Generation virtual methods...
32   void storeRegToStackSlot(MachineBasicBlock &MBB,
33                            MachineBasicBlock::iterator MI,
34                            unsigned SrcReg, int FrameIndex,
35                            const TargetRegisterClass *RC) const;
36
37   void loadRegFromStackSlot(MachineBasicBlock &MBB,
38                             MachineBasicBlock::iterator MI,
39                             unsigned DestReg, int FrameIndex,
40                             const TargetRegisterClass *RC) const;
41
42   void copyRegToReg(MachineBasicBlock &MBB,
43                     MachineBasicBlock::iterator MI,
44                     unsigned DestReg, unsigned SrcReg,
45                     const TargetRegisterClass *RC) const;
46
47   void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
48                      unsigned DestReg, const MachineInstr *Orig) const;
49
50   const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
51
52   const TargetRegisterClass* const* getCalleeSavedRegClasses(
53                                      const MachineFunction *MF = 0) const;
54
55   BitVector getReservedRegs(const MachineFunction &MF) const;
56
57   bool hasFP(const MachineFunction &MF) const;
58
59   void eliminateCallFramePseudoInstr(MachineFunction &MF,
60                                      MachineBasicBlock &MBB,
61                                      MachineBasicBlock::iterator MI) const;
62
63   void eliminateFrameIndex(MachineBasicBlock::iterator MI,
64                            int SPAdj, RegScavenger *RS = NULL) const;
65
66   void emitPrologue(MachineFunction &MF) const;
67   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
68
69   // Debug information queries.
70   unsigned getRARegister() const;
71   unsigned getFrameRegister(MachineFunction &MF) const;
72
73   // Exception handling queries.
74   unsigned getEHExceptionRegister() const;
75   unsigned getEHHandlerRegister() const;
76 };
77
78 } // End llvm namespace
79
80 #endif
81