1 //===-- MBlazeAsmParser.cpp - Parse MBlaze asm to MCInst instructions -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "MBlazeSubtarget.h"
12 #include "MBlazeRegisterInfo.h"
13 #include "MBlazeISelLowering.h"
14 #include "llvm/MC/MCParser/MCAsmLexer.h"
15 #include "llvm/MC/MCParser/MCAsmParser.h"
16 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
17 #include "llvm/MC/MCStreamer.h"
18 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/TargetAsmParser.h"
21 #include "llvm/Target/TargetRegistry.h"
22 #include "llvm/Support/SourceMgr.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/ADT/OwningPtr.h"
25 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Twine.h"
33 class MBlazeAsmParser : public TargetAsmParser {
36 MCAsmParser &getParser() const { return Parser; }
37 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
39 void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); }
40 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
42 MBlazeOperand *ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
43 MBlazeOperand *ParseRegister(unsigned &RegNo);
44 MBlazeOperand *ParseImmediate();
45 MBlazeOperand *ParseFsl();
46 MBlazeOperand* ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands);
48 virtual bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
50 bool ParseDirectiveWord(unsigned Size, SMLoc L);
52 bool MatchAndEmitInstruction(SMLoc IDLoc,
53 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
56 /// @name Auto-generated Match Functions
59 #define GET_ASSEMBLER_HEADER
60 #include "MBlazeGenAsmMatcher.inc"
66 MBlazeAsmParser(MCSubtargetInfo &_STI, MCAsmParser &_Parser)
67 : TargetAsmParser(), Parser(_Parser) {}
69 virtual bool ParseInstruction(StringRef Name, SMLoc NameLoc,
70 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
72 virtual bool ParseDirective(AsmToken DirectiveID);
75 /// MBlazeOperand - Instances of this class represent a parsed MBlaze machine
77 struct MBlazeOperand : public MCParsedAsmOperand {
86 SMLoc StartLoc, EndLoc;
113 MBlazeOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
115 MBlazeOperand(const MBlazeOperand &o) : MCParsedAsmOperand() {
117 StartLoc = o.StartLoc;
138 /// getStartLoc - Get the location of the first token of this operand.
139 SMLoc getStartLoc() const { return StartLoc; }
141 /// getEndLoc - Get the location of the last token of this operand.
142 SMLoc getEndLoc() const { return EndLoc; }
144 unsigned getReg() const {
145 assert(Kind == Register && "Invalid access!");
149 const MCExpr *getImm() const {
150 assert(Kind == Immediate && "Invalid access!");
154 const MCExpr *getFslImm() const {
155 assert(Kind == Fsl && "Invalid access!");
159 unsigned getMemBase() const {
160 assert(Kind == Memory && "Invalid access!");
164 const MCExpr* getMemOff() const {
165 assert(Kind == Memory && "Invalid access!");
169 unsigned getMemOffReg() const {
170 assert(Kind == Memory && "Invalid access!");
174 bool isToken() const { return Kind == Token; }
175 bool isImm() const { return Kind == Immediate; }
176 bool isMem() const { return Kind == Memory; }
177 bool isFsl() const { return Kind == Fsl; }
178 bool isReg() const { return Kind == Register; }
180 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
181 // Add as immediates when possible. Null MCExpr = 0.
183 Inst.addOperand(MCOperand::CreateImm(0));
184 else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
185 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
187 Inst.addOperand(MCOperand::CreateExpr(Expr));
190 void addRegOperands(MCInst &Inst, unsigned N) const {
191 assert(N == 1 && "Invalid number of operands!");
192 Inst.addOperand(MCOperand::CreateReg(getReg()));
195 void addImmOperands(MCInst &Inst, unsigned N) const {
196 assert(N == 1 && "Invalid number of operands!");
197 addExpr(Inst, getImm());
200 void addFslOperands(MCInst &Inst, unsigned N) const {
201 assert(N == 1 && "Invalid number of operands!");
202 addExpr(Inst, getFslImm());
205 void addMemOperands(MCInst &Inst, unsigned N) const {
206 assert(N == 2 && "Invalid number of operands!");
208 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
210 unsigned RegOff = getMemOffReg();
212 Inst.addOperand(MCOperand::CreateReg(RegOff));
214 addExpr(Inst, getMemOff());
217 StringRef getToken() const {
218 assert(Kind == Token && "Invalid access!");
219 return StringRef(Tok.Data, Tok.Length);
222 virtual void print(raw_ostream &OS) const;
224 static MBlazeOperand *CreateToken(StringRef Str, SMLoc S) {
225 MBlazeOperand *Op = new MBlazeOperand(Token);
226 Op->Tok.Data = Str.data();
227 Op->Tok.Length = Str.size();
233 static MBlazeOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
234 MBlazeOperand *Op = new MBlazeOperand(Register);
235 Op->Reg.RegNum = RegNum;
241 static MBlazeOperand *CreateImm(const MCExpr *Val, SMLoc S, SMLoc E) {
242 MBlazeOperand *Op = new MBlazeOperand(Immediate);
249 static MBlazeOperand *CreateFslImm(const MCExpr *Val, SMLoc S, SMLoc E) {
250 MBlazeOperand *Op = new MBlazeOperand(Fsl);
257 static MBlazeOperand *CreateMem(unsigned Base, const MCExpr *Off, SMLoc S,
259 MBlazeOperand *Op = new MBlazeOperand(Memory);
268 static MBlazeOperand *CreateMem(unsigned Base, unsigned Off, SMLoc S,
270 MBlazeOperand *Op = new MBlazeOperand(Memory);
272 Op->Mem.OffReg = Off;
280 } // end anonymous namespace.
282 void MBlazeOperand::print(raw_ostream &OS) const {
289 OS << getMBlazeRegisterNumbering(getReg()) << ">";
292 OS << "'" << getToken() << "'";
296 OS << getMBlazeRegisterNumbering(getMemBase());
299 unsigned RegOff = getMemOffReg();
301 OS << "R" << getMBlazeRegisterNumbering(RegOff);
308 getFslImm()->print(OS);
313 /// @name Auto-generated Match Functions
316 static unsigned MatchRegisterName(StringRef Name);
320 bool MBlazeAsmParser::
321 MatchAndEmitInstruction(SMLoc IDLoc,
322 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
328 switch (MatchInstructionImpl(Operands, Inst, ErrorInfo)) {
330 Out.EmitInstruction(Inst);
332 case Match_MissingFeature:
333 return Error(IDLoc, "instruction use requires an option to be enabled");
334 case Match_MnemonicFail:
335 return Error(IDLoc, "unrecognized instruction mnemonic");
336 case Match_ConversionFail:
337 return Error(IDLoc, "unable to convert operands to instruction");
338 case Match_InvalidOperand:
340 if (ErrorInfo != ~0U) {
341 if (ErrorInfo >= Operands.size())
342 return Error(IDLoc, "too few operands for instruction");
344 ErrorLoc = ((MBlazeOperand*)Operands[ErrorInfo])->getStartLoc();
345 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
348 return Error(ErrorLoc, "invalid operand for instruction");
351 llvm_unreachable("Implement any new match types added!");
355 MBlazeOperand *MBlazeAsmParser::
356 ParseMemory(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
357 if (Operands.size() != 4)
360 MBlazeOperand &Base = *(MBlazeOperand*)Operands[2];
361 MBlazeOperand &Offset = *(MBlazeOperand*)Operands[3];
363 SMLoc S = Base.getStartLoc();
364 SMLoc O = Offset.getStartLoc();
365 SMLoc E = Offset.getEndLoc();
368 Error(S, "base address must be a register");
372 if (!Offset.isReg() && !Offset.isImm()) {
373 Error(O, "offset must be a register or immediate");
379 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getReg(), S, E);
381 Op = MBlazeOperand::CreateMem(Base.getReg(), Offset.getImm(), S, E);
383 delete Operands.pop_back_val();
384 delete Operands.pop_back_val();
385 Operands.push_back(Op);
390 bool MBlazeAsmParser::ParseRegister(unsigned &RegNo,
391 SMLoc &StartLoc, SMLoc &EndLoc) {
392 return (ParseRegister(RegNo) == 0);
395 MBlazeOperand *MBlazeAsmParser::ParseRegister(unsigned &RegNo) {
396 SMLoc S = Parser.getTok().getLoc();
397 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
399 switch (getLexer().getKind()) {
401 case AsmToken::Identifier:
402 RegNo = MatchRegisterName(getLexer().getTok().getIdentifier());
407 return MBlazeOperand::CreateReg(RegNo, S, E);
411 static unsigned MatchFslRegister(StringRef String) {
412 if (!String.startswith("rfsl"))
416 if (String.substr(4).getAsInteger(10,regNum))
422 MBlazeOperand *MBlazeAsmParser::ParseFsl() {
423 SMLoc S = Parser.getTok().getLoc();
424 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
426 switch (getLexer().getKind()) {
428 case AsmToken::Identifier:
429 unsigned reg = MatchFslRegister(getLexer().getTok().getIdentifier());
434 const MCExpr *EVal = MCConstantExpr::Create(reg,getContext());
435 return MBlazeOperand::CreateFslImm(EVal,S,E);
439 MBlazeOperand *MBlazeAsmParser::ParseImmediate() {
440 SMLoc S = Parser.getTok().getLoc();
441 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
444 switch (getLexer().getKind()) {
446 case AsmToken::LParen:
448 case AsmToken::Minus:
449 case AsmToken::Integer:
450 case AsmToken::Identifier:
451 if (getParser().ParseExpression(EVal))
454 return MBlazeOperand::CreateImm(EVal, S, E);
458 MBlazeOperand *MBlazeAsmParser::
459 ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
462 // Attempt to parse the next token as a register name
464 Op = ParseRegister(RegNo);
466 // Attempt to parse the next token as an FSL immediate
470 // Attempt to parse the next token as an immediate
472 Op = ParseImmediate();
474 // If the token could not be parsed then fail
476 Error(Parser.getTok().getLoc(), "unknown operand");
480 // Push the parsed operand into the list of operands
481 Operands.push_back(Op);
485 /// Parse an mblaze instruction mnemonic followed by its operands.
486 bool MBlazeAsmParser::
487 ParseInstruction(StringRef Name, SMLoc NameLoc,
488 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
489 // The first operands is the token for the instruction name
490 size_t dotLoc = Name.find('.');
491 Operands.push_back(MBlazeOperand::CreateToken(Name.substr(0,dotLoc),NameLoc));
492 if (dotLoc < Name.size())
493 Operands.push_back(MBlazeOperand::CreateToken(Name.substr(dotLoc),NameLoc));
495 // If there are no more operands then finish
496 if (getLexer().is(AsmToken::EndOfStatement))
499 // Parse the first operand
500 if (!ParseOperand(Operands))
503 while (getLexer().isNot(AsmToken::EndOfStatement) &&
504 getLexer().is(AsmToken::Comma)) {
505 // Consume the comma token
508 // Parse the next operand
509 if (!ParseOperand(Operands))
513 // If the instruction requires a memory operand then we need to
514 // replace the last two operands (base+offset) with a single
516 if (Name.startswith("lw") || Name.startswith("sw") ||
517 Name.startswith("lh") || Name.startswith("sh") ||
518 Name.startswith("lb") || Name.startswith("sb"))
519 return (ParseMemory(Operands) == NULL);
524 /// ParseDirective parses the arm specific directives
525 bool MBlazeAsmParser::ParseDirective(AsmToken DirectiveID) {
526 StringRef IDVal = DirectiveID.getIdentifier();
527 if (IDVal == ".word")
528 return ParseDirectiveWord(2, DirectiveID.getLoc());
532 /// ParseDirectiveWord
533 /// ::= .word [ expression (, expression)* ]
534 bool MBlazeAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
535 if (getLexer().isNot(AsmToken::EndOfStatement)) {
538 if (getParser().ParseExpression(Value))
541 getParser().getStreamer().EmitValue(Value, Size, 0 /*addrspace*/);
543 if (getLexer().is(AsmToken::EndOfStatement))
546 // FIXME: Improve diagnostic.
547 if (getLexer().isNot(AsmToken::Comma))
548 return Error(L, "unexpected token in directive");
557 extern "C" void LLVMInitializeMBlazeAsmLexer();
559 /// Force static initialization.
560 extern "C" void LLVMInitializeMBlazeAsmParser() {
561 RegisterAsmParser<MBlazeAsmParser> X(TheMBlazeTarget);
562 LLVMInitializeMBlazeAsmLexer();
565 #define GET_REGISTER_MATCHER
566 #define GET_MATCHER_IMPLEMENTATION
567 #include "MBlazeGenAsmMatcher.inc"