1 //===- MBlaze.td - Describe the MBlaze Target Machine -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
9 // This is the top level entry point for the MBlaze target.
10 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
13 // Target-independent interfaces
14 //===----------------------------------------------------------------------===//
16 include "llvm/Target/Target.td"
18 //===----------------------------------------------------------------------===//
19 // Register File, Calling Conv, Instruction Descriptions
20 //===----------------------------------------------------------------------===//
22 include "MBlazeRegisterInfo.td"
23 include "MBlazeSchedule.td"
24 include "MBlazeIntrinsics.td"
25 include "MBlazeInstrInfo.td"
26 include "MBlazeCallingConv.td"
28 def MBlazeInstrInfo : InstrInfo {
29 let TSFlagsFields = [];
30 let TSFlagsShifts = [];
34 //===----------------------------------------------------------------------===//
35 // Microblaze Subtarget features //
36 //===----------------------------------------------------------------------===//
38 def FeaturePipe3 : SubtargetFeature<"pipe3", "HasPipe3", "true",
39 "Implements 3-stage pipeline.">;
40 def FeatureBarrel : SubtargetFeature<"barrel", "HasBarrel", "true",
41 "Implements barrel shifter.">;
42 def FeatureDiv : SubtargetFeature<"div", "HasDiv", "true",
43 "Implements hardware divider.">;
44 def FeatureMul : SubtargetFeature<"mul", "HasMul", "true",
45 "Implements hardware multiplier.">;
46 def FeatureFSL : SubtargetFeature<"fsl", "HasFSL", "true",
47 "Implements FSL instructions.">;
48 def FeatureEFSL : SubtargetFeature<"efsl", "HasEFSL", "true",
49 "Implements extended FSL instructions.">;
50 def FeatureMSRSet : SubtargetFeature<"msrset", "HasMSRSet", "true",
51 "Implements MSR register set and clear.">;
52 def FeatureException : SubtargetFeature<"exception", "HasException", "true",
53 "Implements hardware exception support.">;
54 def FeaturePatCmp : SubtargetFeature<"patcmp", "HasPatCmp", "true",
55 "Implements pattern compare instruction.">;
56 def FeatureFPU : SubtargetFeature<"fpu", "HasFPU", "true",
57 "Implements floating point unit.">;
58 def FeatureESR : SubtargetFeature<"esr", "HasESR", "true",
59 "Implements ESR and EAR registers">;
60 def FeaturePVR : SubtargetFeature<"pvr", "HasPVR", "true",
61 "Implements processor version register.">;
62 def FeatureMul64 : SubtargetFeature<"mul64", "HasMul64", "true",
63 "Implements multiplier with 64-bit result">;
64 def FeatureSqrt : SubtargetFeature<"sqrt", "HasSqrt", "true",
65 "Implements sqrt and floating point convert.">;
66 def FeatureMMU : SubtargetFeature<"mmu", "HasMMU", "true",
67 "Implements memory management unit.">;
69 //===----------------------------------------------------------------------===//
70 // MBlaze processors supported.
71 //===----------------------------------------------------------------------===//
73 class Proc<string Name, list<SubtargetFeature> Features>
74 : Processor<Name, MBlazeGenericItineraries, Features>;
77 def : Proc<"v400", []>;
78 def : Proc<"v500", []>;
79 def : Proc<"v600", []>;
80 def : Proc<"v700", []>;
81 def : Proc<"v710", []>;
84 let InstructionSet = MBlazeInstrInfo;