1 //===-- DelaySlotFiller.cpp - MBlaze delay slot filler --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // A pass that attempts to fill instructions with delay slots. If no
11 // instructions can be moved into the delay slot then a NOP is placed there.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "delay-slot-filler"
18 #include "MBlazeTargetMachine.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/Target/TargetInstrInfo.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
30 STATISTIC(FilledSlots, "Number of delay slots filled");
33 struct Filler : public MachineFunctionPass {
36 const TargetInstrInfo *TII;
39 Filler(TargetMachine &tm)
40 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
42 virtual const char *getPassName() const {
43 return "MBlaze Delay Slot Filler";
46 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
47 bool runOnMachineFunction(MachineFunction &F) {
49 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
51 Changed |= runOnMachineBasicBlock(*FI);
57 } // end of anonymous namespace
59 static bool hasImmInstruction(MachineBasicBlock::iterator &candidate) {
60 // Any instruction with an immediate mode operand greater than
61 // 16-bits requires an implicit IMM instruction.
62 unsigned numOper = candidate->getNumOperands();
63 for (unsigned op = 0; op < numOper; ++op) {
64 if (candidate->getOperand(op).isImm() &&
65 (candidate->getOperand(op).getImm() & 0xFFFFFFFFFFFF0000LL) != 0)
68 // FIXME: we could probably check to see if the FP value happens
69 // to not need an IMM instruction. For now we just always
70 // assume that FP values always do.
71 if (candidate->getOperand(op).isFPImm())
78 static bool delayHasHazard(MachineBasicBlock::iterator &candidate,
79 MachineBasicBlock::iterator &slot) {
81 // Loop over all of the operands in the branch instruction
82 // and make sure that none of them are defined by the
83 // candidate instruction.
84 unsigned numOper = slot->getNumOperands();
85 for (unsigned op = 0; op < numOper; ++op) {
86 if (!slot->getOperand(op).isReg() ||
87 !slot->getOperand(op).isUse() ||
88 slot->getOperand(op).isImplicit())
91 unsigned cnumOper = candidate->getNumOperands();
92 for (unsigned cop = 0; cop < cnumOper; ++cop) {
93 if (candidate->getOperand(cop).isReg() &&
94 candidate->getOperand(cop).isDef() &&
95 candidate->getOperand(cop).getReg() ==
96 slot->getOperand(op).getReg())
101 // There are no hazards between the two instructions
105 static bool usedBeforeDelaySlot(MachineBasicBlock::iterator &candidate,
106 MachineBasicBlock::iterator &slot) {
107 MachineBasicBlock::iterator I = candidate;
108 for (++I; I != slot; ++I) {
109 unsigned numOper = I->getNumOperands();
110 for (unsigned op = 0; op < numOper; ++op) {
111 if (I->getOperand(op).isReg() &&
112 I->getOperand(op).isUse()) {
113 unsigned reg = I->getOperand(op).getReg();
114 unsigned cops = candidate->getNumOperands();
115 for (unsigned cop = 0; cop < cops; ++cop) {
116 if (candidate->getOperand(cop).isReg() &&
117 candidate->getOperand(cop).isDef() &&
118 candidate->getOperand(cop).getReg() == reg)
128 static MachineBasicBlock::iterator
129 findDelayInstr(MachineBasicBlock &MBB,MachineBasicBlock::iterator &slot) {
130 MachineBasicBlock::iterator found = MBB.end();
131 for (MachineBasicBlock::iterator I = MBB.begin(); I != slot; ++I) {
132 TargetInstrDesc desc = I->getDesc();
133 if (desc.hasDelaySlot() || desc.isBranch() ||
134 desc.mayLoad() || desc. mayStore() ||
135 hasImmInstruction(I) || delayHasHazard(I,slot) ||
136 usedBeforeDelaySlot(I,slot)) continue;
144 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
145 /// Currently, we fill delay slots with NOPs. We assume there is only one
146 /// delay slot per delayed instruction.
147 bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) {
148 bool Changed = false;
149 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
150 if (I->getDesc().hasDelaySlot()) {
151 MachineBasicBlock::iterator J = I;
152 MachineBasicBlock::iterator D = findDelayInstr(MBB,I);
159 BuildMI(MBB, J, I->getDebugLoc(), TII->get(MBlaze::NOP));
161 MBB.splice(J, &MBB, D);
166 /// createMBlazeDelaySlotFillerPass - Returns a pass that fills in delay
167 /// slots in MBlaze MachineFunctions
168 FunctionPass *llvm::createMBlazeDelaySlotFillerPass(MBlazeTargetMachine &tm) {
169 return new Filler(tm);