1 //===-- MBlazeISelLowering.h - MBlaze DAG Lowering Interface ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that MBlaze uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef MBlazeISELLOWERING_H
16 #define MBlazeISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
21 #include "MBlazeSubtarget.h"
38 // Start the numbering from where ISD NodeType finishes.
39 FIRST_NUMBER = ISD::BUILTIN_OP_END,
41 // Jump and link (call)
44 // Handle gp_rel (small data/bss sections) relocation.
47 // Select CC Pseudo Instruction
50 // Wrap up multiple types of instructions
61 //===--------------------------------------------------------------------===//
62 // TargetLowering Implementation
63 //===--------------------------------------------------------------------===//
65 class MBlazeTargetLowering : public TargetLowering {
68 explicit MBlazeTargetLowering(MBlazeTargetMachine &TM);
70 /// LowerOperation - Provide custom lowering hooks for some operations.
71 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
73 /// getTargetNodeName - This method returns the name of a target specific
75 virtual const char *getTargetNodeName(unsigned Opcode) const;
77 /// getSetCCResultType - get the ISD::SETCC result ValueType
78 MVT::SimpleValueType getSetCCResultType(EVT VT) const;
80 virtual unsigned getFunctionAlignment(const Function *F) const;
83 const MBlazeSubtarget *Subtarget;
86 // Lower Operand helpers
87 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
88 CallingConv::ID CallConv, bool isVarArg,
89 const SmallVectorImpl<ISD::InputArg> &Ins,
90 DebugLoc dl, SelectionDAG &DAG,
91 SmallVectorImpl<SDValue> &InVals);
93 // Lower Operand specifics
94 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
95 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
96 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
97 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
98 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
101 LowerFormalArguments(SDValue Chain,
102 CallingConv::ID CallConv, bool isVarArg,
103 const SmallVectorImpl<ISD::InputArg> &Ins,
104 DebugLoc dl, SelectionDAG &DAG,
105 SmallVectorImpl<SDValue> &InVals);
108 LowerCall(SDValue Chain, SDValue Callee,
109 CallingConv::ID CallConv, bool isVarArg,
111 const SmallVectorImpl<ISD::OutputArg> &Outs,
112 const SmallVectorImpl<ISD::InputArg> &Ins,
113 DebugLoc dl, SelectionDAG &DAG,
114 SmallVectorImpl<SDValue> &InVals);
117 LowerReturn(SDValue Chain,
118 CallingConv::ID CallConv, bool isVarArg,
119 const SmallVectorImpl<ISD::OutputArg> &Outs,
120 DebugLoc dl, SelectionDAG &DAG);
122 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
123 MachineBasicBlock *MBB,
124 DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
126 // Inline asm support
127 ConstraintType getConstraintType(const std::string &Constraint) const;
129 std::pair<unsigned, const TargetRegisterClass*>
130 getRegForInlineAsmConstraint(const std::string &Constraint,
133 std::vector<unsigned>
134 getRegClassForInlineAsmConstraint(const std::string &Constraint,
137 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
139 /// isFPImmLegal - Returns true if the target can instruction select the
140 /// specified FP immediate natively. If false, the legalizer will
141 /// materialize the FP immediate as a load from a constant pool.
142 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
146 #endif // MBlazeISELLOWERING_H