1 //===-- MBlazeISelLowering.h - MBlaze DAG Lowering Interface ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that MBlaze uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef MBlazeISELLOWERING_H
16 #define MBlazeISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
21 #include "MBlazeSubtarget.h"
38 // Start the numbering from where ISD NodeType finishes.
39 FIRST_NUMBER = ISD::BUILTIN_OP_END,
41 // Jump and link (call)
44 // Handle gp_rel (small data/bss sections) relocation.
47 // Select CC Pseudo Instruction
50 // Wrap up multiple types of instructions
61 //===--------------------------------------------------------------------===//
62 // TargetLowering Implementation
63 //===--------------------------------------------------------------------===//
65 class MBlazeTargetLowering : public TargetLowering {
66 int VarArgsFrameIndex; // FrameIndex for start of varargs area.
70 explicit MBlazeTargetLowering(MBlazeTargetMachine &TM);
72 /// LowerOperation - Provide custom lowering hooks for some operations.
73 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
75 /// getTargetNodeName - This method returns the name of a target specific
77 virtual const char *getTargetNodeName(unsigned Opcode) const;
79 /// getSetCCResultType - get the ISD::SETCC result ValueType
80 MVT::SimpleValueType getSetCCResultType(EVT VT) const;
82 virtual unsigned getFunctionAlignment(const Function *F) const;
85 const MBlazeSubtarget *Subtarget;
88 // Lower Operand helpers
89 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
90 CallingConv::ID CallConv, bool isVarArg,
91 const SmallVectorImpl<ISD::InputArg> &Ins,
92 DebugLoc dl, SelectionDAG &DAG,
93 SmallVectorImpl<SDValue> &InVals);
95 // Lower Operand specifics
96 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
97 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
98 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
99 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
100 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG);
101 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG);
104 LowerFormalArguments(SDValue Chain,
105 CallingConv::ID CallConv, bool isVarArg,
106 const SmallVectorImpl<ISD::InputArg> &Ins,
107 DebugLoc dl, SelectionDAG &DAG,
108 SmallVectorImpl<SDValue> &InVals);
111 LowerCall(SDValue Chain, SDValue Callee,
112 CallingConv::ID CallConv, bool isVarArg,
114 const SmallVectorImpl<ISD::OutputArg> &Outs,
115 const SmallVectorImpl<ISD::InputArg> &Ins,
116 DebugLoc dl, SelectionDAG &DAG,
117 SmallVectorImpl<SDValue> &InVals);
120 LowerReturn(SDValue Chain,
121 CallingConv::ID CallConv, bool isVarArg,
122 const SmallVectorImpl<ISD::OutputArg> &Outs,
123 DebugLoc dl, SelectionDAG &DAG);
125 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
126 MachineBasicBlock *MBB,
127 DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) const;
129 // Inline asm support
130 ConstraintType getConstraintType(const std::string &Constraint) const;
132 std::pair<unsigned, const TargetRegisterClass*>
133 getRegForInlineAsmConstraint(const std::string &Constraint,
136 std::vector<unsigned>
137 getRegClassForInlineAsmConstraint(const std::string &Constraint,
140 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
142 /// isFPImmLegal - Returns true if the target can instruction select the
143 /// specified FP immediate natively. If false, the legalizer will
144 /// materialize the FP immediate as a load from a constant pool.
145 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
149 #endif // MBlazeISELLOWERING_H