1 //===- MBlazeInstrFormats.td - MB Instruction defs ---------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Format specifies the encoding used by the instruction. This is part of the
11 // ad-hoc solution used to emit machine instruction encodings by our machine
13 class Format<bits<6> val> {
17 def FPseudo : Format<0>;
18 def FRRR : Format<1>; // ADD, RSUB, OR, etc.
19 def FRRI : Format<2>; // ADDI, RSUBI, ORI, etc.
20 def FCRR : Format<3>; // PUTD, WDC, WIC, BEQ, BNE, BGE, etc.
21 def FCRI : Format<4>; // RTID, RTED, RTSD, BEQI, BNEI, BGEI, etc.
22 def FRCR : Format<5>; // BRLD, BRALD, GETD
23 def FRCI : Format<6>; // BRLID, BRALID, MSRCLR, MSRSET
24 def FCCR : Format<7>; // BR, BRA, BRD, etc.
25 def FCCI : Format<8>; // IMM, BRI, BRAI, BRID, etc.
26 def FRRCI : Format<9>; // BSRLI, BSRAI, BSLLI
27 def FRRC : Format<10>; // SEXT8, SEXT16, SRA, SRC, SRL, FLT, FINT, FSQRT
28 def FRCX : Format<11>; // GET
29 def FRCS : Format<12>; // MFS
30 def FCRCS : Format<13>; // MTS
31 def FCRCX : Format<14>; // PUT
32 def FCX : Format<15>; // TPUT
33 def FCR : Format<16>; // TPUTD
34 def FRIR : Format<17>; // RSUBI
35 def FC : Format<18>; // NOP
37 //===----------------------------------------------------------------------===//
38 // Describe MBlaze instructions format
40 // CPU INSTRUCTION FORMATS
42 // opcode - operation code.
44 // ra - first src. reg.
45 // rb - second src. reg.
46 // imm16 - 16-bit immediate value.
48 //===----------------------------------------------------------------------===//
50 // Generic MBlaze Format
51 class MBlazeInst<bits<6> op, Format form, dag outs, dag ins, string asmstr,
52 list<dag> pattern, InstrItinClass itin> : Instruction
54 let Namespace = "MBlaze";
59 bits<6> FormBits = Form.Value;
61 // Top 6 bits are the 'opcode' field
62 let Inst{0-5} = opcode;
64 dag OutOperandList = outs;
65 dag InOperandList = ins;
67 let AsmString = asmstr;
68 let Pattern = pattern;
71 // TSFlags layout should be kept in sync with MBlazeInstrInfo.h.
72 let TSFlags{5-0} = FormBits;
75 //===----------------------------------------------------------------------===//
76 // Pseudo instruction class
77 //===----------------------------------------------------------------------===//
78 class MBlazePseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
79 MBlazeInst<0x0, FPseudo, outs, ins, asmstr, pattern, IIPseudo>;
81 //===----------------------------------------------------------------------===//
82 // Type A instruction class in MBlaze : <|opcode|rd|ra|rb|flags|>
83 //===----------------------------------------------------------------------===//
85 class TA<bits<6> op, bits<11> flags, dag outs, dag ins, string asmstr,
86 list<dag> pattern, InstrItinClass itin> :
87 MBlazeInst<op,FRRR,outs, ins, asmstr, pattern, itin>
96 let Inst{21-31} = flags;
99 //===----------------------------------------------------------------------===//
100 // Type B instruction class in MBlaze : <|opcode|rd|ra|immediate|>
101 //===----------------------------------------------------------------------===//
103 class TB<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
104 InstrItinClass itin> :
105 MBlazeInst<op, FRRI, outs, ins, asmstr, pattern, itin>
112 let Inst{11-15} = ra;
113 let Inst{16-31} = imm16;
116 //===----------------------------------------------------------------------===//
117 // Type B instruction class in MBlaze but with the operands reversed in
118 // the LLVM DAG : <|opcode|rd|ra|immediate|>
119 //===----------------------------------------------------------------------===//
120 class TBR<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
121 InstrItinClass itin> :
122 TB<op, outs, ins, asmstr, pattern, itin> {