1 //===- MBlazeInstrInfo.cpp - MBlaze Instruction Information -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MBlaze implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "MBlazeInstrInfo.h"
15 #include "MBlazeTargetMachine.h"
16 #include "MBlazeMachineFunction.h"
17 #include "llvm/ADT/STLExtras.h"
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/CodeGen/MachineRegisterInfo.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "MBlazeGenInstrInfo.inc"
25 MBlazeInstrInfo::MBlazeInstrInfo(MBlazeTargetMachine &tm)
26 : TargetInstrInfoImpl(MBlazeInsts, array_lengthof(MBlazeInsts)),
27 TM(tm), RI(*TM.getSubtargetImpl(), *this) {}
29 static bool isZeroImm(const MachineOperand &op) {
30 return op.isImm() && op.getImm() == 0;
33 /// isLoadFromStackSlot - If the specified machine instruction is a direct
34 /// load from a stack slot, return the virtual or physical register number of
35 /// the destination along with the FrameIndex of the loaded stack slot. If
36 /// not, return 0. This predicate must return 0 if the instruction has
37 /// any side effects other than loading from the stack slot.
38 unsigned MBlazeInstrInfo::
39 isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const {
40 if (MI->getOpcode() == MBlaze::LWI) {
41 if ((MI->getOperand(1).isFI()) && // is a stack slot
42 (MI->getOperand(2).isImm()) && // the imm is zero
43 (isZeroImm(MI->getOperand(2)))) {
44 FrameIndex = MI->getOperand(1).getIndex();
45 return MI->getOperand(0).getReg();
52 /// isStoreToStackSlot - If the specified machine instruction is a direct
53 /// store to a stack slot, return the virtual or physical register number of
54 /// the source reg along with the FrameIndex of the loaded stack slot. If
55 /// not, return 0. This predicate must return 0 if the instruction has
56 /// any side effects other than storing to the stack slot.
57 unsigned MBlazeInstrInfo::
58 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const {
59 if (MI->getOpcode() == MBlaze::SWI) {
60 if ((MI->getOperand(1).isFI()) && // is a stack slot
61 (MI->getOperand(2).isImm()) && // the imm is zero
62 (isZeroImm(MI->getOperand(2)))) {
63 FrameIndex = MI->getOperand(1).getIndex();
64 return MI->getOperand(0).getReg();
70 /// insertNoop - If data hazard condition is found insert the target nop
72 void MBlazeInstrInfo::
73 insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const {
75 BuildMI(MBB, MI, DL, get(MBlaze::NOP));
78 void MBlazeInstrInfo::
79 copyPhysReg(MachineBasicBlock &MBB,
80 MachineBasicBlock::iterator I, DebugLoc DL,
81 unsigned DestReg, unsigned SrcReg,
83 llvm::BuildMI(MBB, I, DL, get(MBlaze::ADD), DestReg)
84 .addReg(SrcReg, getKillRegState(KillSrc)).addReg(MBlaze::R0);
87 void MBlazeInstrInfo::
88 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
89 unsigned SrcReg, bool isKill, int FI,
90 const TargetRegisterClass *RC,
91 const TargetRegisterInfo *TRI) const {
93 BuildMI(MBB, I, DL, get(MBlaze::SWI)).addReg(SrcReg,getKillRegState(isKill))
94 .addFrameIndex(FI).addImm(0); //.addFrameIndex(FI);
97 void MBlazeInstrInfo::
98 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
99 unsigned DestReg, int FI,
100 const TargetRegisterClass *RC,
101 const TargetRegisterInfo *TRI) const {
103 BuildMI(MBB, I, DL, get(MBlaze::LWI), DestReg)
104 .addFrameIndex(FI).addImm(0); //.addFrameIndex(FI);
107 //===----------------------------------------------------------------------===//
109 //===----------------------------------------------------------------------===//
110 unsigned MBlazeInstrInfo::
111 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
112 MachineBasicBlock *FBB,
113 const SmallVectorImpl<MachineOperand> &Cond,
115 // Can only insert uncond branches so far.
116 assert(Cond.empty() && !FBB && TBB && "Can only handle uncond branches!");
117 BuildMI(&MBB, DL, get(MBlaze::BRI)).addMBB(TBB);
121 /// getGlobalBaseReg - Return a virtual register initialized with the
122 /// the global base register value. Output instructions required to
123 /// initialize the register in the function entry block, if necessary.
125 unsigned MBlazeInstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
126 MBlazeFunctionInfo *MBlazeFI = MF->getInfo<MBlazeFunctionInfo>();
127 unsigned GlobalBaseReg = MBlazeFI->getGlobalBaseReg();
128 if (GlobalBaseReg != 0)
129 return GlobalBaseReg;
131 // Insert the set of GlobalBaseReg into the first MBB of the function
132 MachineBasicBlock &FirstMBB = MF->front();
133 MachineBasicBlock::iterator MBBI = FirstMBB.begin();
134 MachineRegisterInfo &RegInfo = MF->getRegInfo();
135 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
137 GlobalBaseReg = RegInfo.createVirtualRegister(MBlaze::GPRRegisterClass);
138 BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
139 GlobalBaseReg).addReg(MBlaze::R20);
140 RegInfo.addLiveIn(MBlaze::R20);
142 MBlazeFI->setGlobalBaseReg(GlobalBaseReg);
143 return GlobalBaseReg;