1 //===- MBlazeInstrInfo.h - MBlaze Instruction Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MBlaze implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef MBLAZEINSTRUCTIONINFO_H
15 #define MBLAZEINSTRUCTIONINFO_H
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Target/TargetInstrInfo.h"
20 #include "MBlazeRegisterInfo.h"
26 // MBlaze Branch Codes
35 // MBlaze Condition Codes
37 // To be used with float branch True
55 // To be used with float branch False
56 // This conditions have the same mnemonic as the
57 // above ones, but are used with a branch False;
75 // Only integer conditions
85 // Turn condition code into conditional branch opcode.
86 inline static unsigned GetCondBranchFromCond(CondCode CC) {
88 default: llvm_unreachable("Unknown condition code");
89 case COND_EQ: return MBlaze::BEQID;
90 case COND_NE: return MBlaze::BNEID;
91 case COND_GT: return MBlaze::BGTID;
92 case COND_GE: return MBlaze::BGEID;
93 case COND_LT: return MBlaze::BLTID;
94 case COND_LE: return MBlaze::BLEID;
98 /// GetOppositeBranchCondition - Return the inverse of the specified cond,
99 /// e.g. turning COND_E to COND_NE.
100 // CondCode GetOppositeBranchCondition(MBlaze::CondCode CC);
102 /// MBlazeCCToString - Map each FP condition code to its string
103 inline static const char *MBlazeFCCToString(MBlaze::CondCode CC) {
105 default: llvm_unreachable("Unknown condition code");
107 case FCOND_T: return "f";
109 case FCOND_OR: return "un";
111 case FCOND_NEQ: return "eq";
113 case FCOND_OGL: return "ueq";
115 case FCOND_UGE: return "olt";
117 case FCOND_OGE: return "ult";
119 case FCOND_UGT: return "ole";
121 case FCOND_OGT: return "ule";
123 case FCOND_ST: return "sf";
125 case FCOND_GLE: return "ngle";
127 case FCOND_SNE: return "seq";
129 case FCOND_GL: return "ngl";
131 case FCOND_NLT: return "lt";
133 case FCOND_GE: return "ge";
135 case FCOND_NLE: return "nle";
137 case FCOND_GT: return "gt";
141 inline static bool isUncondBranchOpcode(int Opc) {
143 default: return false;
152 inline static bool isCondBranchOpcode(int Opc) {
154 default: return false;
155 case MBlaze::BEQI: case MBlaze::BEQID:
156 case MBlaze::BNEI: case MBlaze::BNEID:
157 case MBlaze::BGTI: case MBlaze::BGTID:
158 case MBlaze::BGEI: case MBlaze::BGEID:
159 case MBlaze::BLTI: case MBlaze::BLTID:
160 case MBlaze::BLEI: case MBlaze::BLEID:
166 /// MBlazeII - This namespace holds all of the target specific flags that
167 /// instruction info tracks.
171 // PseudoFrm - This represents an instruction that is a pseudo instruction
172 // or one that has not been implemented yet. It is illegal to code generate
173 // it, but tolerated for intermediate implementation stages.
197 //===------------------------------------------------------------------===//
198 // MBlaze Specific MachineOperand flags.
201 /// MO_GOT - Represents the offset into the global offset table at which
202 /// the address the relocation entry symbol resides during execution.
205 /// MO_GOT_CALL - Represents the offset into the global offset table at
206 /// which the address of a call site relocation entry symbol resides
207 /// during execution. This is different from the above since this flag
208 /// can only be present in call instructions.
211 /// MO_GPREL - Represents the offset from the current gp value to be used
212 /// for the relocatable object file being produced.
215 /// MO_ABS_HILO - Represents the hi or low part of an absolute symbol
222 class MBlazeInstrInfo : public TargetInstrInfoImpl {
223 MBlazeTargetMachine &TM;
224 const MBlazeRegisterInfo RI;
226 explicit MBlazeInstrInfo(MBlazeTargetMachine &TM);
228 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
229 /// such, whenever a client has an instance of instruction info, it should
230 /// always be able to get register info as well (through this method).
232 virtual const MBlazeRegisterInfo &getRegisterInfo() const { return RI; }
234 /// isLoadFromStackSlot - If the specified machine instruction is a direct
235 /// load from a stack slot, return the virtual or physical register number of
236 /// the destination along with the FrameIndex of the loaded stack slot. If
237 /// not, return 0. This predicate must return 0 if the instruction has
238 /// any side effects other than loading from the stack slot.
239 virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
240 int &FrameIndex) const;
242 /// isStoreToStackSlot - If the specified machine instruction is a direct
243 /// store to a stack slot, return the virtual or physical register number of
244 /// the source reg along with the FrameIndex of the loaded stack slot. If
245 /// not, return 0. This predicate must return 0 if the instruction has
246 /// any side effects other than storing to the stack slot.
247 virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
248 int &FrameIndex) const;
251 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
252 MachineBasicBlock *&FBB,
253 SmallVectorImpl<MachineOperand> &Cond,
254 bool AllowModify) const;
255 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
256 MachineBasicBlock *FBB,
257 const SmallVectorImpl<MachineOperand> &Cond,
259 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
261 virtual bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond)
265 virtual void copyPhysReg(MachineBasicBlock &MBB,
266 MachineBasicBlock::iterator I, DebugLoc DL,
267 unsigned DestReg, unsigned SrcReg,
269 virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
270 MachineBasicBlock::iterator MBBI,
271 unsigned SrcReg, bool isKill, int FrameIndex,
272 const TargetRegisterClass *RC,
273 const TargetRegisterInfo *TRI) const;
275 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
276 MachineBasicBlock::iterator MBBI,
277 unsigned DestReg, int FrameIndex,
278 const TargetRegisterClass *RC,
279 const TargetRegisterInfo *TRI) const;
281 /// Insert nop instruction when hazard condition is found
282 virtual void insertNoop(MachineBasicBlock &MBB,
283 MachineBasicBlock::iterator MI) const;
285 /// getGlobalBaseReg - Return a virtual register initialized with the
286 /// the global base register value. Output instructions required to
287 /// initialize the register in the function entry block, if necessary.
289 unsigned getGlobalBaseReg(MachineFunction *MF) const;