1 //===- MBlazeRegisterInfo.cpp - MBlaze Register Information -== -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MBlaze implementation of the TargetRegisterInfo
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "mblaze-reg-info"
18 #include "MBlazeSubtarget.h"
19 #include "MBlazeRegisterInfo.h"
20 #include "MBlazeMachineFunction.h"
21 #include "llvm/Constants.h"
22 #include "llvm/Type.h"
23 #include "llvm/Function.h"
24 #include "llvm/CodeGen/ValueTypes.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineFunction.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineLocation.h"
29 #include "llvm/Target/TargetFrameInfo.h"
30 #include "llvm/Target/TargetMachine.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Support/CommandLine.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/raw_ostream.h"
37 #include "llvm/ADT/BitVector.h"
38 #include "llvm/ADT/STLExtras.h"
43 MBlazeRegisterInfo(const MBlazeSubtarget &ST, const TargetInstrInfo &tii)
44 : MBlazeGenRegisterInfo(MBlaze::ADJCALLSTACKDOWN, MBlaze::ADJCALLSTACKUP),
45 Subtarget(ST), TII(tii) {}
47 /// getRegisterNumbering - Given the enum value for some register, e.g.
48 /// MBlaze::R0, return the number that it corresponds to (e.g. 0).
49 unsigned MBlazeRegisterInfo::getRegisterNumbering(unsigned RegEnum) {
51 case MBlaze::R0 : case MBlaze::F0 : return 0;
52 case MBlaze::R1 : case MBlaze::F1 : return 1;
53 case MBlaze::R2 : case MBlaze::F2 : return 2;
54 case MBlaze::R3 : case MBlaze::F3 : return 3;
55 case MBlaze::R4 : case MBlaze::F4 : return 4;
56 case MBlaze::R5 : case MBlaze::F5 : return 5;
57 case MBlaze::R6 : case MBlaze::F6 : return 6;
58 case MBlaze::R7 : case MBlaze::F7 : return 7;
59 case MBlaze::R8 : case MBlaze::F8 : return 8;
60 case MBlaze::R9 : case MBlaze::F9 : return 9;
61 case MBlaze::R10 : case MBlaze::F10 : return 10;
62 case MBlaze::R11 : case MBlaze::F11 : return 11;
63 case MBlaze::R12 : case MBlaze::F12 : return 12;
64 case MBlaze::R13 : case MBlaze::F13 : return 13;
65 case MBlaze::R14 : case MBlaze::F14 : return 14;
66 case MBlaze::R15 : case MBlaze::F15 : return 15;
67 case MBlaze::R16 : case MBlaze::F16 : return 16;
68 case MBlaze::R17 : case MBlaze::F17 : return 17;
69 case MBlaze::R18 : case MBlaze::F18 : return 18;
70 case MBlaze::R19 : case MBlaze::F19 : return 19;
71 case MBlaze::R20 : case MBlaze::F20 : return 20;
72 case MBlaze::R21 : case MBlaze::F21 : return 21;
73 case MBlaze::R22 : case MBlaze::F22 : return 22;
74 case MBlaze::R23 : case MBlaze::F23 : return 23;
75 case MBlaze::R24 : case MBlaze::F24 : return 24;
76 case MBlaze::R25 : case MBlaze::F25 : return 25;
77 case MBlaze::R26 : case MBlaze::F26 : return 26;
78 case MBlaze::R27 : case MBlaze::F27 : return 27;
79 case MBlaze::R28 : case MBlaze::F28 : return 28;
80 case MBlaze::R29 : case MBlaze::F29 : return 29;
81 case MBlaze::R30 : case MBlaze::F30 : return 30;
82 case MBlaze::R31 : case MBlaze::F31 : return 31;
83 default: llvm_unreachable("Unknown register number!");
85 return 0; // Not reached
88 /// getRegisterFromNumbering - Given the enum value for some register, e.g.
89 /// MBlaze::R0, return the number that it corresponds to (e.g. 0).
90 unsigned MBlazeRegisterInfo::getRegisterFromNumbering(unsigned Reg) {
92 case 0 : return MBlaze::R0;
93 case 1 : return MBlaze::R1;
94 case 2 : return MBlaze::R2;
95 case 3 : return MBlaze::R3;
96 case 4 : return MBlaze::R4;
97 case 5 : return MBlaze::R5;
98 case 6 : return MBlaze::R6;
99 case 7 : return MBlaze::R7;
100 case 8 : return MBlaze::R8;
101 case 9 : return MBlaze::R9;
102 case 10 : return MBlaze::R10;
103 case 11 : return MBlaze::R11;
104 case 12 : return MBlaze::R12;
105 case 13 : return MBlaze::R13;
106 case 14 : return MBlaze::R14;
107 case 15 : return MBlaze::R15;
108 case 16 : return MBlaze::R16;
109 case 17 : return MBlaze::R17;
110 case 18 : return MBlaze::R18;
111 case 19 : return MBlaze::R19;
112 case 20 : return MBlaze::R20;
113 case 21 : return MBlaze::R21;
114 case 22 : return MBlaze::R22;
115 case 23 : return MBlaze::R23;
116 case 24 : return MBlaze::R24;
117 case 25 : return MBlaze::R25;
118 case 26 : return MBlaze::R26;
119 case 27 : return MBlaze::R27;
120 case 28 : return MBlaze::R28;
121 case 29 : return MBlaze::R29;
122 case 30 : return MBlaze::R30;
123 case 31 : return MBlaze::R31;
124 default: llvm_unreachable("Unknown register number!");
126 return 0; // Not reached
129 unsigned MBlazeRegisterInfo::getPICCallReg() {
133 //===----------------------------------------------------------------------===//
134 // Callee Saved Registers methods
135 //===----------------------------------------------------------------------===//
137 /// MBlaze Callee Saved Registers
138 const unsigned* MBlazeRegisterInfo::
139 getCalleeSavedRegs(const MachineFunction *MF) const {
140 // MBlaze callee-save register range is R20 - R31
141 static const unsigned CalleeSavedRegs[] = {
142 MBlaze::R20, MBlaze::R21, MBlaze::R22, MBlaze::R23,
143 MBlaze::R24, MBlaze::R25, MBlaze::R26, MBlaze::R27,
144 MBlaze::R28, MBlaze::R29, MBlaze::R30, MBlaze::R31,
148 return CalleeSavedRegs;
151 BitVector MBlazeRegisterInfo::
152 getReservedRegs(const MachineFunction &MF) const {
153 BitVector Reserved(getNumRegs());
154 Reserved.set(MBlaze::R0);
155 Reserved.set(MBlaze::R1);
156 Reserved.set(MBlaze::R2);
157 Reserved.set(MBlaze::R13);
158 Reserved.set(MBlaze::R14);
159 Reserved.set(MBlaze::R15);
160 Reserved.set(MBlaze::R16);
161 Reserved.set(MBlaze::R17);
162 Reserved.set(MBlaze::R18);
163 Reserved.set(MBlaze::R19);
167 //===----------------------------------------------------------------------===//
169 // Stack Frame Processing methods
170 // +----------------------------+
172 // The stack is allocated decrementing the stack pointer on
173 // the first instruction of a function prologue. Once decremented,
174 // all stack references are are done through a positive offset
175 // from the stack/frame pointer, so the stack is considered
178 //===----------------------------------------------------------------------===//
180 void MBlazeRegisterInfo::adjustMBlazeStackFrame(MachineFunction &MF) const {
181 MachineFrameInfo *MFI = MF.getFrameInfo();
182 MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
184 // See the description at MicroBlazeMachineFunction.h
185 int TopCPUSavedRegOff = -1;
187 // Adjust CPU Callee Saved Registers Area. Registers RA and FP must
188 // be saved in this CPU Area there is the need. This whole Area must
189 // be aligned to the default Stack Alignment requirements.
190 unsigned StackOffset = MFI->getStackSize();
191 unsigned RegSize = 4;
193 // Replace the dummy '0' SPOffset by the negative offsets, as explained on
194 // LowerFORMAL_ARGUMENTS. Leaving '0' for while is necessary to avoid
195 // the approach done by calculateFrameObjectOffsets to the stack frame.
196 MBlazeFI->adjustLoadArgsFI(MFI);
197 MBlazeFI->adjustStoreVarArgsFI(MFI);
200 MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
202 MBlazeFI->setFPStackOffset(StackOffset);
203 TopCPUSavedRegOff = StackOffset;
204 StackOffset += RegSize;
207 if (MFI->adjustsStack()) {
208 MBlazeFI->setRAStackOffset(0);
209 MFI->setObjectOffset(MFI->CreateStackObject(RegSize, RegSize, true),
211 TopCPUSavedRegOff = StackOffset;
212 StackOffset += RegSize;
216 MFI->setStackSize(StackOffset);
218 // Recalculate the final tops offset. The final values must be '0'
219 // if there isn't a callee saved register for CPU or FPU, otherwise
220 // a negative offset is needed.
221 if (TopCPUSavedRegOff >= 0)
222 MBlazeFI->setCPUTopSavedRegOff(TopCPUSavedRegOff-StackOffset);
225 // hasFP - Return true if the specified function should have a dedicated frame
226 // pointer register. This is true if the function has variable sized allocas or
227 // if frame pointer elimination is disabled.
228 bool MBlazeRegisterInfo::hasFP(const MachineFunction &MF) const {
229 const MachineFrameInfo *MFI = MF.getFrameInfo();
230 return DisableFramePointerElim(MF) || MFI->hasVarSizedObjects();
233 // This function eliminate ADJCALLSTACKDOWN,
234 // ADJCALLSTACKUP pseudo instructions
235 void MBlazeRegisterInfo::
236 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
237 MachineBasicBlock::iterator I) const {
238 // Simply discard ADJCALLSTACKDOWN, ADJCALLSTACKUP instructions.
242 // FrameIndex represent objects inside a abstract stack.
243 // We must replace FrameIndex with an stack/frame pointer
245 void MBlazeRegisterInfo::
246 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
247 RegScavenger *RS) const {
248 MachineInstr &MI = *II;
249 MachineFunction &MF = *MI.getParent()->getParent();
252 while (!MI.getOperand(i).isFI()) {
254 assert(i < MI.getNumOperands() &&
255 "Instr doesn't have FrameIndex operand!");
258 unsigned oi = i == 2 ? 1 : 2;
260 DEBUG(errs() << "\nFunction : " << MF.getFunction()->getName() << "\n";
261 errs() << "<--------->\n" << MI);
263 int FrameIndex = MI.getOperand(i).getIndex();
264 int stackSize = MF.getFrameInfo()->getStackSize();
265 int spOffset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
267 DEBUG(errs() << "FrameIndex : " << FrameIndex << "\n"
268 << "spOffset : " << spOffset << "\n"
269 << "stackSize : " << stackSize << "\n");
271 // as explained on LowerFormalArguments, detect negative offsets
272 // and adjust SPOffsets considering the final stack size.
273 int Offset = (spOffset < 0) ? (stackSize - spOffset) : (spOffset + 4);
274 Offset += MI.getOperand(oi).getImm();
276 DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
278 MI.getOperand(oi).ChangeToImmediate(Offset);
279 MI.getOperand(i).ChangeToRegister(getFrameRegister(MF), false);
282 void MBlazeRegisterInfo::
283 emitPrologue(MachineFunction &MF) const {
284 MachineBasicBlock &MBB = MF.front();
285 MachineFrameInfo *MFI = MF.getFrameInfo();
286 MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
287 MachineBasicBlock::iterator MBBI = MBB.begin();
288 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
290 // Get the right frame order for MBlaze.
291 adjustMBlazeStackFrame(MF);
293 // Get the number of bytes to allocate from the FrameInfo.
294 unsigned StackSize = MFI->getStackSize();
296 // No need to allocate space on the stack.
297 if (StackSize == 0 && !MFI->adjustsStack()) return;
298 if (StackSize < 28 && MFI->adjustsStack()) StackSize = 28;
300 int FPOffset = MBlazeFI->getFPStackOffset();
301 int RAOffset = MBlazeFI->getRAStackOffset();
303 // Adjust stack : addi R1, R1, -imm
304 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADDI), MBlaze::R1)
305 .addReg(MBlaze::R1).addImm(-StackSize);
307 // Save the return address only if the function isnt a leaf one.
308 // swi R15, R1, stack_loc
309 if (MFI->adjustsStack()) {
310 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
311 .addReg(MBlaze::R15).addImm(RAOffset).addReg(MBlaze::R1);
314 // if framepointer enabled, save it and set it
315 // to point to the stack pointer
317 // swi R19, R1, stack_loc
318 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::SWI))
319 .addReg(MBlaze::R19).addImm(FPOffset).addReg(MBlaze::R1);
322 BuildMI(MBB, MBBI, DL, TII.get(MBlaze::ADD), MBlaze::R19)
323 .addReg(MBlaze::R1).addReg(MBlaze::R0);
327 void MBlazeRegisterInfo::
328 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const {
329 MachineBasicBlock::iterator MBBI = prior(MBB.end());
330 MachineFrameInfo *MFI = MF.getFrameInfo();
331 MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
332 DebugLoc dl = MBBI->getDebugLoc();
334 // Get the FI's where RA and FP are saved.
335 int FPOffset = MBlazeFI->getFPStackOffset();
336 int RAOffset = MBlazeFI->getRAStackOffset();
338 // if framepointer enabled, restore it and restore the
342 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::ADD), MBlaze::R1)
343 .addReg(MBlaze::R19).addReg(MBlaze::R0);
345 // lwi R19, R1, stack_loc
346 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R19)
347 .addImm(FPOffset).addReg(MBlaze::R1);
350 // Restore the return address only if the function isnt a leaf one.
351 // lwi R15, R1, stack_loc
352 if (MFI->adjustsStack()) {
353 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::LWI), MBlaze::R15)
354 .addImm(RAOffset).addReg(MBlaze::R1);
357 // Get the number of bytes from FrameInfo
358 int StackSize = (int) MFI->getStackSize();
359 if (StackSize < 28 && MFI->adjustsStack()) StackSize = 28;
364 BuildMI(MBB, MBBI, dl, TII.get(MBlaze::ADDI), MBlaze::R1)
365 .addReg(MBlaze::R1).addImm(StackSize);
370 void MBlazeRegisterInfo::
371 processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
372 // Set the stack offset where GP must be saved/loaded from.
373 MachineFrameInfo *MFI = MF.getFrameInfo();
374 MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
375 if (MBlazeFI->needGPSaveRestore())
376 MFI->setObjectOffset(MBlazeFI->getGPFI(), MBlazeFI->getGPStackOffset());
379 unsigned MBlazeRegisterInfo::getRARegister() const {
383 unsigned MBlazeRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
384 return hasFP(MF) ? MBlaze::R19 : MBlaze::R1;
387 unsigned MBlazeRegisterInfo::getEHExceptionRegister() const {
388 llvm_unreachable("What is the exception register");
392 unsigned MBlazeRegisterInfo::getEHHandlerRegister() const {
393 llvm_unreachable("What is the exception handler register");
397 int MBlazeRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
398 llvm_unreachable("What is the dwarf register number");
402 #include "MBlazeGenRegisterInfo.inc"