1 //===- MRegisterInfo.cpp - Target Register Information Implementation -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the MRegisterInfo interface.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/Target/MRegisterInfo.h"
16 #include "llvm/Target/TargetFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/ADT/BitVector.h"
23 MRegisterInfo::MRegisterInfo(const TargetRegisterDesc *D, unsigned NR,
24 regclass_iterator RCB, regclass_iterator RCE,
26 : Desc(D), NumRegs(NR), RegClassBegin(RCB), RegClassEnd(RCE) {
27 assert(NumRegs < FirstVirtualRegister &&
28 "Target has too many physical registers!");
30 CallFrameSetupOpcode = CFSO;
31 CallFrameDestroyOpcode = CFDO;
34 MRegisterInfo::~MRegisterInfo() {}
36 /// getPhysicalRegisterRegClass - Returns the Register Class of a physical
38 const TargetRegisterClass *
39 MRegisterInfo::getPhysicalRegisterRegClass(MVT::ValueType VT,
41 assert(isPhysicalRegister(reg) && "reg must be a physical register");
42 // Pick the register class of the right type that contains this physreg.
43 for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I)
44 if ((*I)->hasType(VT) && (*I)->contains(reg))
46 assert(false && "Couldn't find the register class");
51 /// getAllocatableSetForRC - Toggle the bits that represent allocatable
52 /// registers for the specific register class.
53 static void getAllocatableSetForRC(MachineFunction &MF,
54 const TargetRegisterClass *RC, BitVector &R){
55 for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF),
56 E = RC->allocation_order_end(MF); I != E; ++I)
60 BitVector MRegisterInfo::getAllocatableSet(MachineFunction &MF,
61 const TargetRegisterClass *RC) const {
62 BitVector Allocatable(NumRegs);
64 getAllocatableSetForRC(MF, RC, Allocatable);
68 for (MRegisterInfo::regclass_iterator I = regclass_begin(),
69 E = regclass_end(); I != E; ++I)
70 getAllocatableSetForRC(MF, *I, Allocatable);
74 /// getFrameIndexOffset - Returns the displacement from the frame register to
75 /// the stack frame of the specified index. This is the default implementation
76 /// which is likely incorrect for the target.
77 int MRegisterInfo::getFrameIndexOffset(MachineFunction &MF, unsigned FI) const {
78 const TargetFrameInfo &TFI = *MF.getTarget().getFrameInfo();
79 MachineFrameInfo *MFI = MF.getFrameInfo();
80 return MFI->getObjectOffset(FI) + MFI->getStackSize() -
81 TFI.getOffsetOfLocalArea() + MFI->getOffsetAdjustment();
84 /// getInitialFrameState - Returns a list of machine moves that are assumed
85 /// on entry to a function.
87 MRegisterInfo::getInitialFrameState(std::vector<MachineMove> &Moves) const {
88 // Default is to do nothing.