1 //===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MSP430 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
15 #include "MSP430InstrInfo.h"
16 #include "MSP430MachineFunctionInfo.h"
17 #include "MSP430TargetMachine.h"
18 #include "MSP430GenInstrInfo.inc"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/PseudoSourceValue.h"
24 #include "llvm/Support/ErrorHandling.h"
28 MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
29 : TargetInstrInfoImpl(MSP430Insts, array_lengthof(MSP430Insts)),
30 RI(tm, *this), TM(tm) {}
32 void MSP430InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
33 MachineBasicBlock::iterator MI,
34 unsigned SrcReg, bool isKill, int FrameIdx,
35 const TargetRegisterClass *RC) const {
36 DebugLoc DL = DebugLoc::getUnknownLoc();
37 if (MI != MBB.end()) DL = MI->getDebugLoc();
39 if (RC == &MSP430::GR16RegClass)
40 BuildMI(MBB, MI, DL, get(MSP430::MOV16mr))
41 .addFrameIndex(FrameIdx).addImm(0)
42 .addReg(SrcReg, getKillRegState(isKill));
43 else if (RC == &MSP430::GR8RegClass)
44 BuildMI(MBB, MI, DL, get(MSP430::MOV8mr))
45 .addFrameIndex(FrameIdx).addImm(0)
46 .addReg(SrcReg, getKillRegState(isKill));
48 llvm_unreachable("Cannot store this register to stack slot!");
51 void MSP430InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
52 MachineBasicBlock::iterator MI,
53 unsigned DestReg, int FrameIdx,
54 const TargetRegisterClass *RC) const{
55 DebugLoc DL = DebugLoc::getUnknownLoc();
56 if (MI != MBB.end()) DL = MI->getDebugLoc();
58 if (RC == &MSP430::GR16RegClass)
59 BuildMI(MBB, MI, DL, get(MSP430::MOV16rm))
60 .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
61 else if (RC == &MSP430::GR8RegClass)
62 BuildMI(MBB, MI, DL, get(MSP430::MOV8rm))
63 .addReg(DestReg).addFrameIndex(FrameIdx).addImm(0);
65 llvm_unreachable("Cannot store this register to stack slot!");
68 bool MSP430InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
69 MachineBasicBlock::iterator I,
70 unsigned DestReg, unsigned SrcReg,
71 const TargetRegisterClass *DestRC,
72 const TargetRegisterClass *SrcRC) const {
73 DebugLoc DL = DebugLoc::getUnknownLoc();
74 if (I != MBB.end()) DL = I->getDebugLoc();
76 if (DestRC == SrcRC) {
78 if (DestRC == &MSP430::GR16RegClass) {
79 Opc = MSP430::MOV16rr;
80 } else if (DestRC == &MSP430::GR8RegClass) {
86 BuildMI(MBB, I, DL, get(Opc), DestReg).addReg(SrcReg);
94 MSP430InstrInfo::isMoveInstr(const MachineInstr& MI,
95 unsigned &SrcReg, unsigned &DstReg,
96 unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
97 SrcSubIdx = DstSubIdx = 0; // No sub-registers yet.
99 switch (MI.getOpcode()) {
103 case MSP430::MOV16rr:
104 assert(MI.getNumOperands() >= 2 &&
105 MI.getOperand(0).isReg() &&
106 MI.getOperand(1).isReg() &&
107 "invalid register-register move instruction");
108 SrcReg = MI.getOperand(1).getReg();
109 DstReg = MI.getOperand(0).getReg();
115 MSP430InstrInfo::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
116 MachineBasicBlock::iterator MI,
117 const std::vector<CalleeSavedInfo> &CSI) const {
121 DebugLoc DL = DebugLoc::getUnknownLoc();
122 if (MI != MBB.end()) DL = MI->getDebugLoc();
124 MachineFunction &MF = *MBB.getParent();
125 MSP430MachineFunctionInfo *MFI = MF.getInfo<MSP430MachineFunctionInfo>();
126 MFI->setCalleeSavedFrameSize(CSI.size() * 2);
128 for (unsigned i = CSI.size(); i != 0; --i) {
129 unsigned Reg = CSI[i-1].getReg();
130 // Add the callee-saved register as live-in. It's killed at the spill.
132 BuildMI(MBB, MI, DL, get(MSP430::PUSH16r))
133 .addReg(Reg, RegState::Kill);
139 MSP430InstrInfo::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
140 MachineBasicBlock::iterator MI,
141 const std::vector<CalleeSavedInfo> &CSI) const {
145 DebugLoc DL = DebugLoc::getUnknownLoc();
146 if (MI != MBB.end()) DL = MI->getDebugLoc();
148 for (unsigned i = 0, e = CSI.size(); i != e; ++i)
149 BuildMI(MBB, MI, DL, get(MSP430::POP16r), CSI[i].getReg());
154 unsigned MSP430InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
155 MachineBasicBlock::iterator I = MBB.end();
158 while (I != MBB.begin()) {
160 if (I->getOpcode() != MSP430::JMP &&
161 I->getOpcode() != MSP430::JCC)
163 // Remove the branch.
164 I->eraseFromParent();
172 bool MSP430InstrInfo::
173 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
174 assert(Cond.size() == 1 && "Invalid Xbranch condition!");
176 MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm());
180 assert(0 && "Invalid branch condition!");
182 case MSP430CC::COND_E:
183 CC = MSP430CC::COND_NE;
185 case MSP430CC::COND_NE:
186 CC = MSP430CC::COND_E;
188 case MSP430CC::COND_L:
189 CC = MSP430CC::COND_GE;
191 case MSP430CC::COND_GE:
192 CC = MSP430CC::COND_L;
194 case MSP430CC::COND_HS:
195 CC = MSP430CC::COND_LO;
197 case MSP430CC::COND_LO:
198 CC = MSP430CC::COND_HS;
206 bool MSP430InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB)const{
207 if (MBB.empty()) return false;
209 switch (MBB.back().getOpcode()) {
210 case MSP430::RET: // Return.
211 case MSP430::JMP: // Uncond branch.
213 default: return false;
217 bool MSP430InstrInfo::isUnpredicatedTerminator(const MachineInstr *MI) const {
218 const TargetInstrDesc &TID = MI->getDesc();
219 if (!TID.isTerminator()) return false;
221 // Conditional branch is a special case.
222 if (TID.isBranch() && !TID.isBarrier())
224 if (!TID.isPredicable())
226 return !isPredicated(MI);
229 bool MSP430InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
230 MachineBasicBlock *&TBB,
231 MachineBasicBlock *&FBB,
232 SmallVectorImpl<MachineOperand> &Cond,
233 bool AllowModify) const {
234 // Start from the bottom of the block and work up, examining the
235 // terminator instructions.
236 MachineBasicBlock::iterator I = MBB.end();
237 while (I != MBB.begin()) {
239 // Working from the bottom, when we see a non-terminator
240 // instruction, we're done.
241 if (!isUnpredicatedTerminator(I))
244 // A terminator that isn't a branch can't easily be handled
246 if (!I->getDesc().isBranch())
249 // Handle unconditional branches.
250 if (I->getOpcode() == MSP430::JMP) {
252 TBB = I->getOperand(0).getMBB();
256 // If the block has any instructions after a JMP, delete them.
257 while (next(I) != MBB.end())
258 next(I)->eraseFromParent();
262 // Delete the JMP if it's equivalent to a fall-through.
263 if (MBB.isLayoutSuccessor(I->getOperand(0).getMBB())) {
265 I->eraseFromParent();
270 // TBB is used to indicate the unconditinal destination.
271 TBB = I->getOperand(0).getMBB();
275 // Handle conditional branches.
276 assert(I->getOpcode() == MSP430::JCC && "Invalid conditional branch");
277 MSP430CC::CondCodes BranchCode =
278 static_cast<MSP430CC::CondCodes>(I->getOperand(1).getImm());
279 if (BranchCode == MSP430CC::COND_INVALID)
280 return true; // Can't handle weird stuff.
282 // Working from the bottom, handle the first conditional branch.
285 TBB = I->getOperand(0).getMBB();
286 Cond.push_back(MachineOperand::CreateImm(BranchCode));
290 // Handle subsequent conditional branches. Only handle the case where all
291 // conditional branches branch to the same destination.
292 assert(Cond.size() == 1);
295 // Only handle the case where all conditional branches branch to
296 // the same destination.
297 if (TBB != I->getOperand(0).getMBB())
300 MSP430CC::CondCodes OldBranchCode = (MSP430CC::CondCodes)Cond[0].getImm();
301 // If the conditions are the same, we can leave them alone.
302 if (OldBranchCode == BranchCode)
312 MSP430InstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
313 MachineBasicBlock *FBB,
314 const SmallVectorImpl<MachineOperand> &Cond) const {
315 // FIXME this should probably have a DebugLoc operand
316 DebugLoc dl = DebugLoc::getUnknownLoc();
318 // Shouldn't be a fall through.
319 assert(TBB && "InsertBranch must not be told to insert a fallthrough");
320 assert((Cond.size() == 1 || Cond.size() == 0) &&
321 "MSP430 branch conditions have one component!");
324 // Unconditional branch?
325 assert(!FBB && "Unconditional branch with multiple successors!");
326 BuildMI(&MBB, dl, get(MSP430::JMP)).addMBB(TBB);
330 // Conditional branch.
332 BuildMI(&MBB, dl, get(MSP430::JCC)).addMBB(TBB).addImm(Cond[0].getImm());
336 // Two-way Conditional branch. Insert the second branch.
337 BuildMI(&MBB, dl, get(MSP430::JMP)).addMBB(FBB);