1 //===- MSP430InstrInfo.td - MSP430 Instruction defs -----------*- tblgen-*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the MSP430 instructions in TableGen format.
12 //===----------------------------------------------------------------------===//
14 include "MSP430InstrFormats.td"
16 //===----------------------------------------------------------------------===//
18 //===----------------------------------------------------------------------===//
19 class SDTCisI8<int OpNum> : SDTCisVT<OpNum, i8>;
20 class SDTCisI16<int OpNum> : SDTCisVT<OpNum, i16>;
22 //===----------------------------------------------------------------------===//
24 //===----------------------------------------------------------------------===//
26 //===----------------------------------------------------------------------===//
27 // MSP430 Specific Node Definitions.
28 //===----------------------------------------------------------------------===//
29 def MSP430retflag : SDNode<"MSP430ISD::RET_FLAG", SDTNone,
30 [SDNPHasChain, SDNPOptInFlag]>;
32 def MSP430rra : SDNode<"MSP430ISD::RRA", SDTIntUnaryOp, []>;
34 //===----------------------------------------------------------------------===//
35 // Pseudo Instructions
36 //===----------------------------------------------------------------------===//
38 def NOP : Pseudo<(outs), (ins), "nop", []>;
40 //===----------------------------------------------------------------------===//
42 //===----------------------------------------------------------------------===//
44 // FIXME: Provide proper encoding!
45 let isReturn = 1, isTerminator = 1 in {
46 def RETI : Pseudo<(outs), (ins), "ret", [(MSP430retflag)]>;
49 //===----------------------------------------------------------------------===//
52 // FIXME: Provide proper encoding!
53 let neverHasSideEffects = 1 in {
54 def MOV16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src),
55 "mov.w\t{$src, $dst|$dst, $src}",
59 // FIXME: Provide proper encoding!
60 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
61 def MOV16ri : Pseudo<(outs GR16:$dst), (ins i16imm:$src),
62 "mov.w\t{$src, $dst|$dst, $src}",
63 [(set GR16:$dst, imm:$src)]>;
66 //===----------------------------------------------------------------------===//
67 // Arithmetic Instructions
70 let isCommutable = 1 in { // X = ADD Y, Z == X = ADD Z, Y
72 // FIXME: Provide proper encoding!
73 def ADD16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
74 "add.w\t{$src2, $dst|$dst, $src2}",
75 [(set GR16:$dst, (add GR16:$src1, GR16:$src2)),
79 // FIXME: Provide proper encoding!
80 let isTwoAddress = 1 in {
81 def SAR16r1 : Pseudo<(outs GR16:$dst), (ins GR16:$src),
83 [(set GR16:$dst, (MSP430rra GR16:$src)),