1 //===- MSP430RegisterInfo.cpp - MSP430 Register Information ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MSP430 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "msp430-reg-info"
17 #include "MSP430RegisterInfo.h"
18 #include "MSP430TargetMachine.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/Target/TargetMachine.h"
23 #include "llvm/Target/TargetOptions.h"
24 #include "llvm/ADT/BitVector.h"
28 // FIXME: Provide proper call frame setup / destroy opcodes.
29 MSP430RegisterInfo::MSP430RegisterInfo(MSP430TargetMachine &tm,
30 const TargetInstrInfo &tii)
31 : MSP430GenRegisterInfo(MSP430::ADJCALLSTACKDOWN, MSP430::ADJCALLSTACKUP),
33 StackAlign = TM.getFrameInfo()->getStackAlignment();
37 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
38 static const unsigned CalleeSavedRegs[] = {
39 MSP430::FPW, MSP430::R5W, MSP430::R6W, MSP430::R7W,
40 MSP430::R8W, MSP430::R9W, MSP430::R10W, MSP430::R11W,
44 return CalleeSavedRegs;
47 const TargetRegisterClass* const*
48 MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
49 static const TargetRegisterClass * const CalleeSavedRegClasses[] = {
50 &MSP430::GR16RegClass, &MSP430::GR16RegClass,
51 &MSP430::GR16RegClass, &MSP430::GR16RegClass,
52 &MSP430::GR16RegClass, &MSP430::GR16RegClass,
53 &MSP430::GR16RegClass, &MSP430::GR16RegClass,
57 return CalleeSavedRegClasses;
61 MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
62 BitVector Reserved(getNumRegs());
64 // Mark 4 special registers as reserved.
65 Reserved.set(MSP430::PCW);
66 Reserved.set(MSP430::SPW);
67 Reserved.set(MSP430::SRW);
68 Reserved.set(MSP430::CGW);
70 // Mark frame pointer as reserved if needed.
72 Reserved.set(MSP430::FPW);
77 const TargetRegisterClass* MSP430RegisterInfo::getPointerRegClass() const {
78 return &MSP430::GR16RegClass;
82 bool MSP430RegisterInfo::hasFP(const MachineFunction &MF) const {
83 return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
86 bool MSP430RegisterInfo::hasReservedCallFrame(MachineFunction &MF) const {
87 return !MF.getFrameInfo()->hasVarSizedObjects();
90 void MSP430RegisterInfo::
91 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
92 MachineBasicBlock::iterator I) const {
93 if (!hasReservedCallFrame(MF)) {
94 // If the stack pointer can be changed after prologue, turn the
95 // adjcallstackup instruction into a 'sub SPW, <amt>' and the
96 // adjcallstackdown instruction into 'add SPW, <amt>'
97 // TODO: consider using push / pop instead of sub + store / add
98 MachineInstr *Old = I;
99 uint64_t Amount = Old->getOperand(0).getImm();
101 // We need to keep the stack aligned properly. To do this, we round the
102 // amount of space needed for the outgoing arguments up to the next
103 // alignment boundary.
104 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign;
106 MachineInstr *New = 0;
107 if (Old->getOpcode() == getCallFrameSetupOpcode()) {
108 New = BuildMI(MF, Old->getDebugLoc(),
109 TII.get(MSP430::SUB16ri), MSP430::SPW)
110 .addReg(MSP430::SPW).addImm(Amount);
112 assert(Old->getOpcode() == getCallFrameDestroyOpcode());
113 // factor out the amount the callee already popped.
114 uint64_t CalleeAmt = Old->getOperand(1).getImm();
117 New = BuildMI(MF, Old->getDebugLoc(),
118 TII.get(MSP430::ADD16ri), MSP430::SPW)
119 .addReg(MSP430::SPW).addImm(Amount);
123 // The SRW implicit def is dead.
124 New->getOperand(3).setIsDead();
126 // Replace the pseudo instruction with a new instruction...
130 } else if (I->getOpcode() == getCallFrameDestroyOpcode()) {
131 // If we are performing frame pointer elimination and if the callee pops
132 // something off the stack pointer, add it back.
133 if (uint64_t CalleeAmt = I->getOperand(1).getImm()) {
134 MachineInstr *Old = I;
136 BuildMI(MF, Old->getDebugLoc(), TII.get(MSP430::SUB16ri),
137 MSP430::SPW).addReg(MSP430::SPW).addImm(CalleeAmt);
138 // The SRW implicit def is dead.
139 New->getOperand(3).setIsDead();
149 MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
150 int SPAdj, RegScavenger *RS) const {
151 assert(SPAdj == 0 && "Unexpected");
154 MachineInstr &MI = *II;
155 MachineBasicBlock &MBB = *MI.getParent();
156 MachineFunction &MF = *MBB.getParent();
157 DebugLoc dl = MI.getDebugLoc();
158 while (!MI.getOperand(i).isFI()) {
160 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
163 int FrameIndex = MI.getOperand(i).getIndex();
165 unsigned BasePtr = (hasFP(MF) ? MSP430::FPW : MSP430::SPW);
166 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
169 Offset += MF.getFrameInfo()->getStackSize();
174 // Fold imm into offset
175 Offset += MI.getOperand(i+1).getImm();
177 if (MI.getOpcode() == MSP430::ADD16ri) {
178 // This is actually "load effective address" of the stack slot
179 // instruction. We have only two-address instructions, thus we need to
180 // expand it into mov + add
182 MI.setDesc(TII.get(MSP430::MOV16rr));
183 MI.getOperand(i).ChangeToRegister(BasePtr, false);
188 // We need to materialize the offset via add instruction.
189 unsigned DstReg = MI.getOperand(0).getReg();
191 BuildMI(MBB, next(II), dl, TII.get(MSP430::SUB16ri), DstReg)
192 .addReg(DstReg).addImm(-Offset);
194 BuildMI(MBB, next(II), dl, TII.get(MSP430::ADD16ri), DstReg)
195 .addReg(DstReg).addImm(Offset);
200 MI.getOperand(i).ChangeToRegister(BasePtr, false);
201 MI.getOperand(i+1).ChangeToImmediate(Offset);
204 void MSP430RegisterInfo::emitPrologue(MachineFunction &MF) const {
208 void MSP430RegisterInfo::emitEpilogue(MachineFunction &MF,
209 MachineBasicBlock &MBB) const {
213 unsigned MSP430RegisterInfo::getRARegister() const {
214 assert(0 && "Not implemented yet!");
217 unsigned MSP430RegisterInfo::getFrameRegister(MachineFunction &MF) const {
218 assert(0 && "Not implemented yet!");
221 int MSP430RegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
222 assert(0 && "Not implemented yet!");
225 #include "MSP430GenRegisterInfo.inc"