1 //===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MipsMCTargetDesc.h"
11 #include "MipsRegisterInfo.h"
12 #include "llvm/ADT/StringSwitch.h"
13 #include "llvm/MC/MCContext.h"
14 #include "llvm/MC/MCExpr.h"
15 #include "llvm/MC/MCInst.h"
16 #include "llvm/MC/MCStreamer.h"
17 #include "llvm/MC/MCSubtargetInfo.h"
18 #include "llvm/MC/MCSymbol.h"
19 #include "llvm/MC/MCParser/MCAsmLexer.h"
20 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
21 #include "llvm/MC/MCTargetAsmParser.h"
22 #include "llvm/Support/TargetRegistry.h"
27 class MipsAssemblerOptions {
29 MipsAssemblerOptions():
30 aTReg(1), reorder(true), macro(true) {
33 unsigned getATRegNum() {return aTReg;}
34 bool setATReg(unsigned Reg);
36 bool isReorder() {return reorder;}
37 void setReorder() {reorder = true;}
38 void setNoreorder() {reorder = false;}
40 bool isMacro() {return macro;}
41 void setMacro() {macro = true;}
42 void setNomacro() {macro = false;}
52 class MipsAsmParser : public MCTargetAsmParser {
64 MipsAssemblerOptions Options;
67 #define GET_ASSEMBLER_HEADER
68 #include "MipsGenAsmMatcher.inc"
70 bool MatchAndEmitInstruction(SMLoc IDLoc,
71 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
74 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
76 bool ParseInstruction(StringRef Name, SMLoc NameLoc,
77 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
79 bool parseMathOperation(StringRef Name, SMLoc NameLoc,
80 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
82 bool ParseDirective(AsmToken DirectiveID);
84 MipsAsmParser::OperandMatchResultTy
85 parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&);
87 bool ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &,
90 int tryParseRegister(StringRef Mnemonic);
92 bool tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
95 bool needsExpansion(MCInst &Inst);
97 void expandInstruction(MCInst &Inst, SMLoc IDLoc,
98 SmallVectorImpl<MCInst*> &Instructions);
99 void expandLoadImm(MCInst &Inst, SMLoc IDLoc,
100 SmallVectorImpl<MCInst*> &Instructions);
101 bool reportParseError(StringRef ErrorMsg);
103 bool parseMemOffset(const MCExpr *&Res);
104 bool parseRelocOperand(const MCExpr *&Res);
106 bool parseDirectiveSet();
108 bool parseSetAtDirective();
109 bool parseSetNoAtDirective();
110 bool parseSetMacroDirective();
111 bool parseSetNoMacroDirective();
112 bool parseSetReorderDirective();
113 bool parseSetNoReorderDirective();
115 MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol);
117 bool isMips64() const {
118 return (STI.getFeatureBits() & Mips::FeatureMips64) != 0;
121 bool isFP64() const {
122 return (STI.getFeatureBits() & Mips::FeatureFP64Bit) != 0;
125 int matchRegisterName(StringRef Symbol);
127 int matchRegisterByNumber(unsigned RegNum, StringRef Mnemonic);
129 void setFpFormat(FpFormatTy Format) {
133 void setDefaultFpFormat();
135 void setFpFormat(StringRef Format);
137 FpFormatTy getFpFormat() {return FpFormat;}
139 bool requestsDoubleOperand(StringRef Mnemonic);
141 unsigned getReg(int RC,int RegNo);
145 MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
146 : MCTargetAsmParser(), STI(sti), Parser(parser) {
147 // Initialize the set of available features.
148 setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
151 MCAsmParser &getParser() const { return Parser; }
152 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
159 /// MipsOperand - Instances of this class represent a parsed Mips machine
161 class MipsOperand : public MCParsedAsmOperand {
173 MipsOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
195 SMLoc StartLoc, EndLoc;
198 void addRegOperands(MCInst &Inst, unsigned N) const {
199 assert(N == 1 && "Invalid number of operands!");
200 Inst.addOperand(MCOperand::CreateReg(getReg()));
203 void addExpr(MCInst &Inst, const MCExpr *Expr) const{
204 // Add as immediate when possible. Null MCExpr = 0.
206 Inst.addOperand(MCOperand::CreateImm(0));
207 else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
208 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
210 Inst.addOperand(MCOperand::CreateExpr(Expr));
213 void addImmOperands(MCInst &Inst, unsigned N) const {
214 assert(N == 1 && "Invalid number of operands!");
215 const MCExpr *Expr = getImm();
219 void addMemOperands(MCInst &Inst, unsigned N) const {
220 assert(N == 2 && "Invalid number of operands!");
222 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
224 const MCExpr *Expr = getMemOff();
228 bool isReg() const { return Kind == k_Register; }
229 bool isImm() const { return Kind == k_Immediate; }
230 bool isToken() const { return Kind == k_Token; }
231 bool isMem() const { return Kind == k_Memory; }
233 StringRef getToken() const {
234 assert(Kind == k_Token && "Invalid access!");
235 return StringRef(Tok.Data, Tok.Length);
238 unsigned getReg() const {
239 assert((Kind == k_Register) && "Invalid access!");
243 const MCExpr *getImm() const {
244 assert((Kind == k_Immediate) && "Invalid access!");
248 unsigned getMemBase() const {
249 assert((Kind == k_Memory) && "Invalid access!");
253 const MCExpr *getMemOff() const {
254 assert((Kind == k_Memory) && "Invalid access!");
258 static MipsOperand *CreateToken(StringRef Str, SMLoc S) {
259 MipsOperand *Op = new MipsOperand(k_Token);
260 Op->Tok.Data = Str.data();
261 Op->Tok.Length = Str.size();
267 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
268 MipsOperand *Op = new MipsOperand(k_Register);
269 Op->Reg.RegNum = RegNum;
275 static MipsOperand *CreateImm(const MCExpr *Val, SMLoc S, SMLoc E) {
276 MipsOperand *Op = new MipsOperand(k_Immediate);
283 static MipsOperand *CreateMem(unsigned Base, const MCExpr *Off,
285 MipsOperand *Op = new MipsOperand(k_Memory);
293 /// getStartLoc - Get the location of the first token of this operand.
294 SMLoc getStartLoc() const { return StartLoc; }
295 /// getEndLoc - Get the location of the last token of this operand.
296 SMLoc getEndLoc() const { return EndLoc; }
298 virtual void print(raw_ostream &OS) const {
299 llvm_unreachable("unimplemented!");
304 bool MipsAsmParser::needsExpansion(MCInst &Inst) {
306 switch(Inst.getOpcode()) {
307 case Mips::LoadImm32Reg:
313 void MipsAsmParser::expandInstruction(MCInst &Inst, SMLoc IDLoc,
314 SmallVectorImpl<MCInst*> &Instructions){
315 switch(Inst.getOpcode()) {
316 case Mips::LoadImm32Reg:
317 return expandLoadImm(Inst, IDLoc, Instructions);
321 void MipsAsmParser::expandLoadImm(MCInst &Inst, SMLoc IDLoc,
322 SmallVectorImpl<MCInst*> &Instructions){
323 MCInst *tmpInst = new MCInst();
324 const MCOperand &ImmOp = Inst.getOperand(1);
325 assert(ImmOp.isImm() && "expected imediate operand kind");
326 const MCOperand &RegOp = Inst.getOperand(0);
327 assert(RegOp.isReg() && "expected register operand kind");
329 int ImmValue = ImmOp.getImm();
330 tmpInst->setLoc(IDLoc);
331 if ( 0 <= ImmValue && ImmValue <= 65535) {
332 // for 0 = j = 65535.
333 // li d,j => ori d,$zero,j
334 tmpInst->setOpcode(isMips64() ? Mips::ORi64 : Mips::ORi);
335 tmpInst->addOperand(MCOperand::CreateReg(RegOp.getReg()));
337 MCOperand::CreateReg(isMips64() ? Mips::ZERO_64 : Mips::ZERO));
338 tmpInst->addOperand(MCOperand::CreateImm(ImmValue));
339 Instructions.push_back(tmpInst);
340 } else if ( ImmValue < 0 && ImmValue >= -32768) {
341 // for -32768 = j < 0.
342 // li d,j => addiu d,$zero,j
343 tmpInst->setOpcode(Mips::ADDiu); //TODO:no ADDiu64 in td files?
344 tmpInst->addOperand(MCOperand::CreateReg(RegOp.getReg()));
346 MCOperand::CreateReg(isMips64() ? Mips::ZERO_64 : Mips::ZERO));
347 tmpInst->addOperand(MCOperand::CreateImm(ImmValue));
348 Instructions.push_back(tmpInst);
350 // for any other value of j that is representable as a 32-bit integer.
351 // li d,j => lui d,hi16(j)
353 tmpInst->setOpcode(isMips64() ? Mips::LUi64 : Mips::LUi);
354 tmpInst->addOperand(MCOperand::CreateReg(RegOp.getReg()));
355 tmpInst->addOperand(MCOperand::CreateImm((ImmValue & 0xffff0000) >> 16));
356 Instructions.push_back(tmpInst);
357 tmpInst = new MCInst();
358 tmpInst->setOpcode(isMips64() ? Mips::ORi64 : Mips::ORi);
359 tmpInst->addOperand(MCOperand::CreateReg(RegOp.getReg()));
360 tmpInst->addOperand(MCOperand::CreateReg(RegOp.getReg()));
361 tmpInst->addOperand(MCOperand::CreateImm(ImmValue & 0xffff));
362 tmpInst->setLoc(IDLoc);
363 Instructions.push_back(tmpInst);
367 MatchAndEmitInstruction(SMLoc IDLoc,
368 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
373 MatchInstMapAndConstraints MapAndConstraints;
374 unsigned MatchResult = MatchInstructionImpl(Operands, Kind, Inst,
375 MapAndConstraints, ErrorInfo,
376 /*matchingInlineAsm*/ false);
378 switch (MatchResult) {
380 case Match_Success: {
381 if (needsExpansion(Inst)) {
382 SmallVector<MCInst*, 4> Instructions;
383 expandInstruction(Inst, IDLoc, Instructions);
384 for(unsigned i =0; i < Instructions.size(); i++){
385 Inst = *(Instructions[i]);
386 Out.EmitInstruction(Inst);
390 Out.EmitInstruction(Inst);
394 case Match_MissingFeature:
395 Error(IDLoc, "instruction requires a CPU feature not currently enabled");
397 case Match_InvalidOperand: {
398 SMLoc ErrorLoc = IDLoc;
399 if (ErrorInfo != ~0U) {
400 if (ErrorInfo >= Operands.size())
401 return Error(IDLoc, "too few operands for instruction");
403 ErrorLoc = ((MipsOperand*)Operands[ErrorInfo])->getStartLoc();
404 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
407 return Error(ErrorLoc, "invalid operand for instruction");
409 case Match_MnemonicFail:
410 return Error(IDLoc, "invalid instruction");
415 int MipsAsmParser::matchRegisterName(StringRef Name) {
417 int CC = StringSwitch<unsigned>(Name)
418 .Case("zero", Mips::ZERO)
419 .Case("a0", Mips::A0)
420 .Case("a1", Mips::A1)
421 .Case("a2", Mips::A2)
422 .Case("a3", Mips::A3)
423 .Case("v0", Mips::V0)
424 .Case("v1", Mips::V1)
425 .Case("s0", Mips::S0)
426 .Case("s1", Mips::S1)
427 .Case("s2", Mips::S2)
428 .Case("s3", Mips::S3)
429 .Case("s4", Mips::S4)
430 .Case("s5", Mips::S5)
431 .Case("s6", Mips::S6)
432 .Case("s7", Mips::S7)
433 .Case("k0", Mips::K0)
434 .Case("k1", Mips::K1)
435 .Case("sp", Mips::SP)
436 .Case("fp", Mips::FP)
437 .Case("gp", Mips::GP)
438 .Case("ra", Mips::RA)
439 .Case("t0", Mips::T0)
440 .Case("t1", Mips::T1)
441 .Case("t2", Mips::T2)
442 .Case("t3", Mips::T3)
443 .Case("t4", Mips::T4)
444 .Case("t5", Mips::T5)
445 .Case("t6", Mips::T6)
446 .Case("t7", Mips::T7)
447 .Case("t8", Mips::T8)
448 .Case("t9", Mips::T9)
449 .Case("at", Mips::AT)
450 .Case("fcc0", Mips::FCC0)
454 // 64 bit register in Mips are following 32 bit definitions.
460 if (Name[0] == 'f') {
461 StringRef NumString = Name.substr(1);
463 if( NumString.getAsInteger(10, IntVal))
464 return -1; // not integer
468 FpFormatTy Format = getFpFormat();
470 if (Format == FP_FORMAT_S || Format == FP_FORMAT_W)
471 return getReg(Mips::FGR32RegClassID, IntVal);
472 if (Format == FP_FORMAT_D) {
474 return getReg(Mips::FGR64RegClassID, IntVal);
476 // only even numbers available as register pairs
477 if (( IntVal > 31) || (IntVal%2 != 0))
479 return getReg(Mips::AFGR64RegClassID, IntVal/2);
485 void MipsAsmParser::setDefaultFpFormat() {
487 if (isMips64() || isFP64())
488 FpFormat = FP_FORMAT_D;
490 FpFormat = FP_FORMAT_S;
493 bool MipsAsmParser::requestsDoubleOperand(StringRef Mnemonic){
495 bool IsDouble = StringSwitch<bool>(Mnemonic.lower())
504 void MipsAsmParser::setFpFormat(StringRef Format) {
506 FpFormat = StringSwitch<FpFormatTy>(Format.lower())
507 .Case(".s", FP_FORMAT_S)
508 .Case(".d", FP_FORMAT_D)
509 .Case(".l", FP_FORMAT_L)
510 .Case(".w", FP_FORMAT_W)
511 .Default(FP_FORMAT_NONE);
514 bool MipsAssemblerOptions::setATReg(unsigned Reg) {
522 unsigned MipsAsmParser::getATReg() {
523 unsigned Reg = Options.getATRegNum();
525 return getReg(Mips::CPU64RegsRegClassID,Reg);
527 return getReg(Mips::CPURegsRegClassID,Reg);
530 unsigned MipsAsmParser::getReg(int RC,int RegNo) {
531 return *(getContext().getRegisterInfo().getRegClass(RC).begin() + RegNo);
534 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum, StringRef Mnemonic) {
536 if (Mnemonic.lower() == "rdhwr") {
537 // at the moment only hwreg29 is supported
546 return getReg(Mips::CPURegsRegClassID, RegNum);
549 int MipsAsmParser::tryParseRegister(StringRef Mnemonic) {
550 const AsmToken &Tok = Parser.getTok();
553 if (Tok.is(AsmToken::Identifier)) {
554 std::string lowerCase = Tok.getString().lower();
555 RegNum = matchRegisterName(lowerCase);
556 } else if (Tok.is(AsmToken::Integer))
557 RegNum = matchRegisterByNumber(static_cast<unsigned>(Tok.getIntVal()),
560 return RegNum; //error
561 // 64 bit div operations require Mips::ZERO instead of MIPS::ZERO_64
562 if (isMips64() && RegNum == Mips::ZERO_64) {
563 if (Mnemonic.find("ddiv") != StringRef::npos)
570 tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
573 SMLoc S = Parser.getTok().getLoc();
576 // FIXME: we should make a more generic method for CCR
577 if ((Mnemonic == "cfc1" || Mnemonic == "ctc1")
578 && Operands.size() == 2 && Parser.getTok().is(AsmToken::Integer)){
579 RegNo = Parser.getTok().getIntVal(); // get the int value
580 // at the moment only fcc0 is supported
584 RegNo = tryParseRegister(Mnemonic);
588 Operands.push_back(MipsOperand::CreateReg(RegNo, S,
589 Parser.getTok().getLoc()));
590 Parser.Lex(); // Eat register token.
594 bool MipsAsmParser::ParseOperand(SmallVectorImpl<MCParsedAsmOperand*>&Operands,
595 StringRef Mnemonic) {
596 // Check if the current operand has a custom associated parser, if so, try to
597 // custom parse the operand, or fallback to the general approach.
598 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic);
599 if (ResTy == MatchOperand_Success)
601 // If there wasn't a custom match, try the generic matcher below. Otherwise,
602 // there was a match, but an error occurred, in which case, just return that
603 // the operand parsing failed.
604 if (ResTy == MatchOperand_ParseFail)
607 switch (getLexer().getKind()) {
609 Error(Parser.getTok().getLoc(), "unexpected token in operand");
611 case AsmToken::Dollar: {
613 SMLoc S = Parser.getTok().getLoc();
614 Parser.Lex(); // Eat dollar token.
615 // parse register operand
616 if (!tryParseRegisterOperand(Operands, Mnemonic)) {
617 if (getLexer().is(AsmToken::LParen)) {
618 // check if it is indexed addressing operand
619 Operands.push_back(MipsOperand::CreateToken("(", S));
620 Parser.Lex(); // eat parenthesis
621 if (getLexer().isNot(AsmToken::Dollar))
624 Parser.Lex(); // eat dollar
625 if (tryParseRegisterOperand(Operands, Mnemonic))
628 if (!getLexer().is(AsmToken::RParen))
631 S = Parser.getTok().getLoc();
632 Operands.push_back(MipsOperand::CreateToken(")", S));
637 // maybe it is a symbol reference
638 StringRef Identifier;
639 if (Parser.ParseIdentifier(Identifier))
642 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
644 MCSymbol *Sym = getContext().GetOrCreateSymbol("$" + Identifier);
646 // Otherwise create a symbol ref.
647 const MCExpr *Res = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_None,
650 Operands.push_back(MipsOperand::CreateImm(Res, S, E));
653 case AsmToken::Identifier:
654 case AsmToken::LParen:
655 case AsmToken::Minus:
657 case AsmToken::Integer:
658 case AsmToken::String: {
659 // quoted label names
661 SMLoc S = Parser.getTok().getLoc();
662 if (getParser().ParseExpression(IdVal))
664 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
665 Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
668 case AsmToken::Percent: {
669 // it is a symbol reference or constant expression
671 SMLoc S = Parser.getTok().getLoc(); // start location of the operand
672 if (parseRelocOperand(IdVal))
675 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
677 Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
679 } // case AsmToken::Percent
680 } // switch(getLexer().getKind())
684 bool MipsAsmParser::parseRelocOperand(const MCExpr *&Res) {
686 Parser.Lex(); // eat % token
687 const AsmToken &Tok = Parser.getTok(); // get next token, operation
688 if (Tok.isNot(AsmToken::Identifier))
691 std::string Str = Tok.getIdentifier().str();
693 Parser.Lex(); // eat identifier
694 // now make expression from the rest of the operand
698 if (getLexer().getKind() == AsmToken::LParen) {
700 Parser.Lex(); // eat '(' token
701 if (getLexer().getKind() == AsmToken::Percent) {
702 Parser.Lex(); // eat % token
703 const AsmToken &nextTok = Parser.getTok();
704 if (nextTok.isNot(AsmToken::Identifier))
707 Str += nextTok.getIdentifier();
708 Parser.Lex(); // eat identifier
709 if (getLexer().getKind() != AsmToken::LParen)
714 if (getParser().ParseParenExpression(IdVal,EndLoc))
717 while (getLexer().getKind() == AsmToken::RParen)
718 Parser.Lex(); // eat ')' token
721 return true; // parenthesis must follow reloc operand
723 // Check the type of the expression
724 if (const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(IdVal)) {
725 // it's a constant, evaluate lo or hi value
726 int Val = MCE->getValue();
729 } else if (Str == "hi") {
730 Val = (Val & 0xffff0000) >> 16;
732 Res = MCConstantExpr::Create(Val, getContext());
736 if (const MCSymbolRefExpr *MSRE = dyn_cast<MCSymbolRefExpr>(IdVal)) {
737 // it's a symbol, create symbolic expression from symbol
738 StringRef Symbol = MSRE->getSymbol().getName();
739 MCSymbolRefExpr::VariantKind VK = getVariantKind(Str);
740 Res = MCSymbolRefExpr::Create(Symbol,VK,getContext());
746 bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
749 StartLoc = Parser.getTok().getLoc();
750 RegNo = tryParseRegister("");
751 EndLoc = Parser.getTok().getLoc();
752 return (RegNo == (unsigned)-1);
755 bool MipsAsmParser::parseMemOffset(const MCExpr *&Res) {
759 switch(getLexer().getKind()) {
762 case AsmToken::Integer:
763 case AsmToken::Minus:
765 return (getParser().ParseExpression(Res));
766 case AsmToken::Percent:
767 return parseRelocOperand(Res);
768 case AsmToken::LParen:
769 return false; // it's probably assuming 0
774 MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand(
775 SmallVectorImpl<MCParsedAsmOperand*>&Operands) {
777 const MCExpr *IdVal = 0;
779 // first operand is the offset
780 S = Parser.getTok().getLoc();
782 if (parseMemOffset(IdVal))
783 return MatchOperand_ParseFail;
785 const AsmToken &Tok = Parser.getTok(); // get next token
786 if (Tok.isNot(AsmToken::LParen)) {
787 Error(Parser.getTok().getLoc(), "'(' expected");
788 return MatchOperand_ParseFail;
791 Parser.Lex(); // Eat '(' token.
793 const AsmToken &Tok1 = Parser.getTok(); //get next token
794 if (Tok1.is(AsmToken::Dollar)) {
795 Parser.Lex(); // Eat '$' token.
796 if (tryParseRegisterOperand(Operands,"")) {
797 Error(Parser.getTok().getLoc(), "unexpected token in operand");
798 return MatchOperand_ParseFail;
802 Error(Parser.getTok().getLoc(), "unexpected token in operand");
803 return MatchOperand_ParseFail;
806 const AsmToken &Tok2 = Parser.getTok(); // get next token
807 if (Tok2.isNot(AsmToken::RParen)) {
808 Error(Parser.getTok().getLoc(), "')' expected");
809 return MatchOperand_ParseFail;
812 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
814 Parser.Lex(); // Eat ')' token.
817 IdVal = MCConstantExpr::Create(0, getContext());
819 // now replace register operand with the mem operand
820 MipsOperand* op = static_cast<MipsOperand*>(Operands.back());
821 int RegNo = op->getReg();
822 // remove register from operands
824 // and add memory operand
825 Operands.push_back(MipsOperand::CreateMem(RegNo, IdVal, S, E));
827 return MatchOperand_Success;
830 MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) {
832 MCSymbolRefExpr::VariantKind VK
833 = StringSwitch<MCSymbolRefExpr::VariantKind>(Symbol)
834 .Case("hi", MCSymbolRefExpr::VK_Mips_ABS_HI)
835 .Case("lo", MCSymbolRefExpr::VK_Mips_ABS_LO)
836 .Case("gp_rel", MCSymbolRefExpr::VK_Mips_GPREL)
837 .Case("call16", MCSymbolRefExpr::VK_Mips_GOT_CALL)
838 .Case("got", MCSymbolRefExpr::VK_Mips_GOT)
839 .Case("tlsgd", MCSymbolRefExpr::VK_Mips_TLSGD)
840 .Case("tlsldm", MCSymbolRefExpr::VK_Mips_TLSLDM)
841 .Case("dtprel_hi", MCSymbolRefExpr::VK_Mips_DTPREL_HI)
842 .Case("dtprel_lo", MCSymbolRefExpr::VK_Mips_DTPREL_LO)
843 .Case("gottprel", MCSymbolRefExpr::VK_Mips_GOTTPREL)
844 .Case("tprel_hi", MCSymbolRefExpr::VK_Mips_TPREL_HI)
845 .Case("tprel_lo", MCSymbolRefExpr::VK_Mips_TPREL_LO)
846 .Case("got_disp", MCSymbolRefExpr::VK_Mips_GOT_DISP)
847 .Case("got_page", MCSymbolRefExpr::VK_Mips_GOT_PAGE)
848 .Case("got_ofst", MCSymbolRefExpr::VK_Mips_GOT_OFST)
849 .Case("hi(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_HI)
850 .Case("lo(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_LO)
851 .Default(MCSymbolRefExpr::VK_None);
856 static int ConvertCcString(StringRef CondString) {
857 int CC = StringSwitch<unsigned>(CondString)
880 parseMathOperation(StringRef Name, SMLoc NameLoc,
881 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
883 size_t Start = Name.find('.'), Next = Name.rfind('.');
884 StringRef Format1 = Name.slice(Start, Next);
885 // and add the first format to the operands
886 Operands.push_back(MipsOperand::CreateToken(Format1, NameLoc));
887 // now for the second format
888 StringRef Format2 = Name.slice(Next, StringRef::npos);
889 Operands.push_back(MipsOperand::CreateToken(Format2, NameLoc));
891 // set the format for the first register
892 setFpFormat(Format1);
894 // Read the remaining operands.
895 if (getLexer().isNot(AsmToken::EndOfStatement)) {
896 // Read the first operand.
897 if (ParseOperand(Operands, Name)) {
898 SMLoc Loc = getLexer().getLoc();
899 Parser.EatToEndOfStatement();
900 return Error(Loc, "unexpected token in argument list");
903 if (getLexer().isNot(AsmToken::Comma)) {
904 SMLoc Loc = getLexer().getLoc();
905 Parser.EatToEndOfStatement();
906 return Error(Loc, "unexpected token in argument list");
909 Parser.Lex(); // Eat the comma.
911 //set the format for the first register
912 setFpFormat(Format2);
914 // Parse and remember the operand.
915 if (ParseOperand(Operands, Name)) {
916 SMLoc Loc = getLexer().getLoc();
917 Parser.EatToEndOfStatement();
918 return Error(Loc, "unexpected token in argument list");
922 if (getLexer().isNot(AsmToken::EndOfStatement)) {
923 SMLoc Loc = getLexer().getLoc();
924 Parser.EatToEndOfStatement();
925 return Error(Loc, "unexpected token in argument list");
928 Parser.Lex(); // Consume the EndOfStatement
933 ParseInstruction(StringRef Name, SMLoc NameLoc,
934 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
935 // floating point instructions: should register be treated as double?
936 if (requestsDoubleOperand(Name)) {
937 setFpFormat(FP_FORMAT_D);
938 Operands.push_back(MipsOperand::CreateToken(Name, NameLoc));
941 setDefaultFpFormat();
942 // Create the leading tokens for the mnemonic, split by '.' characters.
943 size_t Start = 0, Next = Name.find('.');
944 StringRef Mnemonic = Name.slice(Start, Next);
946 Operands.push_back(MipsOperand::CreateToken(Mnemonic, NameLoc));
948 if (Next != StringRef::npos) {
949 // there is a format token in mnemonic
950 // StringRef Rest = Name.slice(Next, StringRef::npos);
951 size_t Dot = Name.find('.', Next+1);
952 StringRef Format = Name.slice(Next, Dot);
953 if (Dot == StringRef::npos) //only one '.' in a string, it's a format
954 Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
956 if (Name.startswith("c.")){
957 // floating point compare, add '.' and immediate represent for cc
958 Operands.push_back(MipsOperand::CreateToken(".", NameLoc));
959 int Cc = ConvertCcString(Format);
961 return Error(NameLoc, "Invalid conditional code");
963 SMLoc E = SMLoc::getFromPointer(
964 Parser.getTok().getLoc().getPointer() -1 );
965 Operands.push_back(MipsOperand::CreateImm(
966 MCConstantExpr::Create(Cc, getContext()), NameLoc, E));
968 // trunc, ceil, floor ...
969 return parseMathOperation(Name, NameLoc, Operands);
972 // the rest is a format
973 Format = Name.slice(Dot, StringRef::npos);
974 Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
981 // Read the remaining operands.
982 if (getLexer().isNot(AsmToken::EndOfStatement)) {
983 // Read the first operand.
984 if (ParseOperand(Operands, Name)) {
985 SMLoc Loc = getLexer().getLoc();
986 Parser.EatToEndOfStatement();
987 return Error(Loc, "unexpected token in argument list");
990 while (getLexer().is(AsmToken::Comma) ) {
991 Parser.Lex(); // Eat the comma.
993 // Parse and remember the operand.
994 if (ParseOperand(Operands, Name)) {
995 SMLoc Loc = getLexer().getLoc();
996 Parser.EatToEndOfStatement();
997 return Error(Loc, "unexpected token in argument list");
1002 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1003 SMLoc Loc = getLexer().getLoc();
1004 Parser.EatToEndOfStatement();
1005 return Error(Loc, "unexpected token in argument list");
1008 Parser.Lex(); // Consume the EndOfStatement
1012 bool MipsAsmParser::reportParseError(StringRef ErrorMsg) {
1013 SMLoc Loc = getLexer().getLoc();
1014 Parser.EatToEndOfStatement();
1015 return Error(Loc, ErrorMsg);
1018 bool MipsAsmParser::parseSetNoAtDirective() {
1019 // line should look like:
1022 Options.setATReg(0);
1025 // if this is not the end of the statement, report error
1026 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1027 reportParseError("unexpected token in statement");
1030 Parser.Lex(); // Consume the EndOfStatement
1033 bool MipsAsmParser::parseSetAtDirective() {
1035 // .set at - defaults to $1
1038 if (getLexer().is(AsmToken::EndOfStatement)) {
1039 Options.setATReg(1);
1040 Parser.Lex(); // Consume the EndOfStatement
1042 } else if (getLexer().is(AsmToken::Equal)) {
1043 getParser().Lex(); //eat '='
1044 if (getLexer().isNot(AsmToken::Dollar)) {
1045 reportParseError("unexpected token in statement");
1048 Parser.Lex(); // eat '$'
1049 if (getLexer().isNot(AsmToken::Integer)) {
1050 reportParseError("unexpected token in statement");
1053 const AsmToken &Reg = Parser.getTok();
1054 if (!Options.setATReg(Reg.getIntVal())) {
1055 reportParseError("unexpected token in statement");
1058 getParser().Lex(); //eat reg
1060 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1061 reportParseError("unexpected token in statement");
1064 Parser.Lex(); // Consume the EndOfStatement
1067 reportParseError("unexpected token in statement");
1072 bool MipsAsmParser::parseSetReorderDirective() {
1074 // if this is not the end of the statement, report error
1075 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1076 reportParseError("unexpected token in statement");
1079 Options.setReorder();
1080 Parser.Lex(); // Consume the EndOfStatement
1084 bool MipsAsmParser::parseSetNoReorderDirective() {
1086 // if this is not the end of the statement, report error
1087 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1088 reportParseError("unexpected token in statement");
1091 Options.setNoreorder();
1092 Parser.Lex(); // Consume the EndOfStatement
1096 bool MipsAsmParser::parseSetMacroDirective() {
1098 // if this is not the end of the statement, report error
1099 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1100 reportParseError("unexpected token in statement");
1104 Parser.Lex(); // Consume the EndOfStatement
1108 bool MipsAsmParser::parseSetNoMacroDirective() {
1110 // if this is not the end of the statement, report error
1111 if (getLexer().isNot(AsmToken::EndOfStatement)) {
1112 reportParseError("`noreorder' must be set before `nomacro'");
1115 if (Options.isReorder()) {
1116 reportParseError("`noreorder' must be set before `nomacro'");
1119 Options.setNomacro();
1120 Parser.Lex(); // Consume the EndOfStatement
1123 bool MipsAsmParser::parseDirectiveSet() {
1126 const AsmToken &Tok = Parser.getTok();
1128 if (Tok.getString() == "noat") {
1129 return parseSetNoAtDirective();
1130 } else if (Tok.getString() == "at") {
1131 return parseSetAtDirective();
1132 } else if (Tok.getString() == "reorder") {
1133 return parseSetReorderDirective();
1134 } else if (Tok.getString() == "noreorder") {
1135 return parseSetNoReorderDirective();
1136 } else if (Tok.getString() == "macro") {
1137 return parseSetMacroDirective();
1138 } else if (Tok.getString() == "nomacro") {
1139 return parseSetNoMacroDirective();
1140 } else if (Tok.getString() == "nomips16") {
1141 // ignore this directive for now
1142 Parser.EatToEndOfStatement();
1144 } else if (Tok.getString() == "nomicromips") {
1145 // ignore this directive for now
1146 Parser.EatToEndOfStatement();
1152 bool MipsAsmParser::ParseDirective(AsmToken DirectiveID) {
1154 if (DirectiveID.getString() == ".ent") {
1155 // ignore this directive for now
1160 if (DirectiveID.getString() == ".end") {
1161 // ignore this directive for now
1166 if (DirectiveID.getString() == ".frame") {
1167 // ignore this directive for now
1168 Parser.EatToEndOfStatement();
1172 if (DirectiveID.getString() == ".set") {
1173 return parseDirectiveSet();
1176 if (DirectiveID.getString() == ".fmask") {
1177 // ignore this directive for now
1178 Parser.EatToEndOfStatement();
1182 if (DirectiveID.getString() == ".mask") {
1183 // ignore this directive for now
1184 Parser.EatToEndOfStatement();
1188 if (DirectiveID.getString() == ".gpword") {
1189 // ignore this directive for now
1190 Parser.EatToEndOfStatement();
1197 extern "C" void LLVMInitializeMipsAsmParser() {
1198 RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
1199 RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
1200 RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
1201 RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);
1204 #define GET_REGISTER_MATCHER
1205 #define GET_MATCHER_IMPLEMENTATION
1206 #include "MipsGenAsmMatcher.inc"