1 //===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MipsMCTargetDesc.h"
11 #include "MipsRegisterInfo.h"
12 #include "llvm/ADT/StringSwitch.h"
13 #include "llvm/MC/MCContext.h"
14 #include "llvm/MC/MCExpr.h"
15 #include "llvm/MC/MCInst.h"
16 #include "llvm/MC/MCStreamer.h"
17 #include "llvm/MC/MCSubtargetInfo.h"
18 #include "llvm/MC/MCSymbol.h"
19 #include "llvm/MC/MCParser/MCAsmLexer.h"
20 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
21 #include "llvm/MC/MCTargetAsmParser.h"
22 #include "llvm/Support/TargetRegistry.h"
28 class MipsAsmParser : public MCTargetAsmParser {
41 #define GET_ASSEMBLER_HEADER
42 #include "MipsGenAsmMatcher.inc"
44 bool MatchAndEmitInstruction(SMLoc IDLoc,
45 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
48 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
50 bool ParseInstruction(StringRef Name, SMLoc NameLoc,
51 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
53 bool parseMathOperation(StringRef Name, SMLoc NameLoc,
54 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
56 bool ParseDirective(AsmToken DirectiveID);
58 MipsAsmParser::OperandMatchResultTy
59 parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&);
62 getMCInstOperandNum(unsigned Kind, MCInst &Inst,
63 const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
64 unsigned OperandNum, unsigned &NumMCOperands);
66 bool ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &,
69 int tryParseRegister(StringRef Mnemonic);
71 bool tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
74 bool parseMemOffset(const MCExpr *&Res);
75 bool parseRelocOperand(const MCExpr *&Res);
76 MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol);
78 bool isMips64() const {
79 return (STI.getFeatureBits() & Mips::FeatureMips64) != 0;
83 return (STI.getFeatureBits() & Mips::FeatureFP64Bit) != 0;
86 int matchRegisterName(StringRef Symbol);
88 int matchRegisterByNumber(unsigned RegNum, StringRef Mnemonic);
90 void setFpFormat(FpFormatTy Format) {
94 void setDefaultFpFormat();
96 void setFpFormat(StringRef Format);
98 FpFormatTy getFpFormat() {return FpFormat;}
100 bool requestsDoubleOperand(StringRef Mnemonic);
102 unsigned getReg(int RC,int RegNo);
105 MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
106 : MCTargetAsmParser(), STI(sti), Parser(parser) {
107 // Initialize the set of available features.
108 setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
111 MCAsmParser &getParser() const { return Parser; }
112 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
119 /// MipsOperand - Instances of this class represent a parsed Mips machine
121 class MipsOperand : public MCParsedAsmOperand {
133 MipsOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
155 SMLoc StartLoc, EndLoc;
158 void addRegOperands(MCInst &Inst, unsigned N) const {
159 assert(N == 1 && "Invalid number of operands!");
160 Inst.addOperand(MCOperand::CreateReg(getReg()));
163 void addExpr(MCInst &Inst, const MCExpr *Expr) const{
164 // Add as immediate when possible. Null MCExpr = 0.
166 Inst.addOperand(MCOperand::CreateImm(0));
167 else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
168 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
170 Inst.addOperand(MCOperand::CreateExpr(Expr));
173 void addImmOperands(MCInst &Inst, unsigned N) const {
174 assert(N == 1 && "Invalid number of operands!");
175 const MCExpr *Expr = getImm();
179 void addMemOperands(MCInst &Inst, unsigned N) const {
180 assert(N == 2 && "Invalid number of operands!");
182 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
184 const MCExpr *Expr = getMemOff();
188 bool isReg() const { return Kind == k_Register; }
189 bool isImm() const { return Kind == k_Immediate; }
190 bool isToken() const { return Kind == k_Token; }
191 bool isMem() const { return Kind == k_Memory; }
193 StringRef getToken() const {
194 assert(Kind == k_Token && "Invalid access!");
195 return StringRef(Tok.Data, Tok.Length);
198 unsigned getReg() const {
199 assert((Kind == k_Register) && "Invalid access!");
203 const MCExpr *getImm() const {
204 assert((Kind == k_Immediate) && "Invalid access!");
208 unsigned getMemBase() const {
209 assert((Kind == k_Memory) && "Invalid access!");
213 const MCExpr *getMemOff() const {
214 assert((Kind == k_Memory) && "Invalid access!");
218 static MipsOperand *CreateToken(StringRef Str, SMLoc S) {
219 MipsOperand *Op = new MipsOperand(k_Token);
220 Op->Tok.Data = Str.data();
221 Op->Tok.Length = Str.size();
227 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
228 MipsOperand *Op = new MipsOperand(k_Register);
229 Op->Reg.RegNum = RegNum;
235 static MipsOperand *CreateImm(const MCExpr *Val, SMLoc S, SMLoc E) {
236 MipsOperand *Op = new MipsOperand(k_Immediate);
243 static MipsOperand *CreateMem(unsigned Base, const MCExpr *Off,
245 MipsOperand *Op = new MipsOperand(k_Memory);
253 /// getStartLoc - Get the location of the first token of this operand.
254 SMLoc getStartLoc() const { return StartLoc; }
255 /// getEndLoc - Get the location of the last token of this operand.
256 SMLoc getEndLoc() const { return EndLoc; }
258 virtual void print(raw_ostream &OS) const {
259 llvm_unreachable("unimplemented!");
264 unsigned MipsAsmParser::
265 getMCInstOperandNum(unsigned Kind, MCInst &Inst,
266 const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
267 unsigned OperandNum, unsigned &NumMCOperands) {
268 assert (0 && "getMCInstOperandNum() not supported by the Mips target.");
269 // The Mips backend doesn't currently include the matcher implementation, so
270 // the getMCInstOperandNumImpl() is undefined. This is a temporary
277 MatchAndEmitInstruction(SMLoc IDLoc,
278 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
283 unsigned MatchResult = MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo);
285 switch (MatchResult) {
287 case Match_Success: {
289 Out.EmitInstruction(Inst);
292 case Match_MissingFeature:
293 Error(IDLoc, "instruction requires a CPU feature not currently enabled");
295 case Match_InvalidOperand: {
296 SMLoc ErrorLoc = IDLoc;
297 if (ErrorInfo != ~0U) {
298 if (ErrorInfo >= Operands.size())
299 return Error(IDLoc, "too few operands for instruction");
301 ErrorLoc = ((MipsOperand*)Operands[ErrorInfo])->getStartLoc();
302 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
305 return Error(ErrorLoc, "invalid operand for instruction");
307 case Match_MnemonicFail:
308 return Error(IDLoc, "invalid instruction");
313 int MipsAsmParser::matchRegisterName(StringRef Name) {
315 int CC = StringSwitch<unsigned>(Name)
316 .Case("zero", Mips::ZERO)
317 .Case("a0", Mips::A0)
318 .Case("a1", Mips::A1)
319 .Case("a2", Mips::A2)
320 .Case("a3", Mips::A3)
321 .Case("v0", Mips::V0)
322 .Case("v1", Mips::V1)
323 .Case("s0", Mips::S0)
324 .Case("s1", Mips::S1)
325 .Case("s2", Mips::S2)
326 .Case("s3", Mips::S3)
327 .Case("s4", Mips::S4)
328 .Case("s5", Mips::S5)
329 .Case("s6", Mips::S6)
330 .Case("s7", Mips::S7)
331 .Case("k0", Mips::K0)
332 .Case("k1", Mips::K1)
333 .Case("sp", Mips::SP)
334 .Case("fp", Mips::FP)
335 .Case("gp", Mips::GP)
336 .Case("ra", Mips::RA)
337 .Case("t0", Mips::T0)
338 .Case("t1", Mips::T1)
339 .Case("t2", Mips::T2)
340 .Case("t3", Mips::T3)
341 .Case("t4", Mips::T4)
342 .Case("t5", Mips::T5)
343 .Case("t6", Mips::T6)
344 .Case("t7", Mips::T7)
345 .Case("t8", Mips::T8)
346 .Case("t9", Mips::T9)
347 .Case("at", Mips::AT)
348 .Case("fcc0", Mips::FCC0)
352 //64 bit register in Mips are following 32 bit definitions.
358 if (Name[0] == 'f') {
359 StringRef NumString = Name.substr(1);
361 if( NumString.getAsInteger(10, IntVal))
362 return -1; //not integer
366 FpFormatTy Format = getFpFormat();
368 if (Format == FP_FORMAT_S || Format == FP_FORMAT_W)
369 return getReg(Mips::FGR32RegClassID, IntVal);
370 if (Format == FP_FORMAT_D) {
372 return getReg(Mips::FGR64RegClassID, IntVal);
374 //only even numbers available as register pairs
375 if (( IntVal > 31) || (IntVal%2 != 0))
377 return getReg(Mips::AFGR64RegClassID, IntVal/2);
383 void MipsAsmParser::setDefaultFpFormat() {
385 if (isMips64() || isFP64())
386 FpFormat = FP_FORMAT_D;
388 FpFormat = FP_FORMAT_S;
391 bool MipsAsmParser::requestsDoubleOperand(StringRef Mnemonic){
393 bool IsDouble = StringSwitch<bool>(Mnemonic.lower())
402 void MipsAsmParser::setFpFormat(StringRef Format) {
404 FpFormat = StringSwitch<FpFormatTy>(Format.lower())
405 .Case(".s", FP_FORMAT_S)
406 .Case(".d", FP_FORMAT_D)
407 .Case(".l", FP_FORMAT_L)
408 .Case(".w", FP_FORMAT_W)
409 .Default(FP_FORMAT_NONE);
412 unsigned MipsAsmParser::getReg(int RC,int RegNo){
413 return *(getContext().getRegisterInfo().getRegClass(RC).begin() + RegNo);
416 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum,StringRef Mnemonic) {
418 if (Mnemonic.lower() == "rdhwr") {
419 //at the moment only hwreg29 is supported
428 return getReg(Mips::CPURegsRegClassID,RegNum);
431 int MipsAsmParser::tryParseRegister(StringRef Mnemonic) {
432 const AsmToken &Tok = Parser.getTok();
435 if (Tok.is(AsmToken::Identifier)) {
436 std::string lowerCase = Tok.getString().lower();
437 RegNum = matchRegisterName(lowerCase);
438 } else if (Tok.is(AsmToken::Integer))
439 RegNum = matchRegisterByNumber(static_cast<unsigned> (Tok.getIntVal()),
442 return RegNum; //error
443 //64 bit div operations require Mips::ZERO instead of MIPS::ZERO_64
444 if (isMips64() && RegNum == Mips::ZERO_64) {
445 if (Mnemonic.find("ddiv") != StringRef::npos)
452 tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
455 SMLoc S = Parser.getTok().getLoc();
458 //FIXME: we should make a more generic method for CCR
459 if ((Mnemonic == "cfc1" || Mnemonic == "ctc1")
460 && Operands.size() == 2 && Parser.getTok().is(AsmToken::Integer)){
461 RegNo = Parser.getTok().getIntVal(); //get the int value
462 //at the moment only fcc0 is supported
466 RegNo = tryParseRegister(Mnemonic);
470 Operands.push_back(MipsOperand::CreateReg(RegNo, S,
471 Parser.getTok().getLoc()));
472 Parser.Lex(); // Eat register token.
476 bool MipsAsmParser::ParseOperand(SmallVectorImpl<MCParsedAsmOperand*>&Operands,
477 StringRef Mnemonic) {
478 //Check if the current operand has a custom associated parser, if so, try to
479 //custom parse the operand, or fallback to the general approach.
480 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic);
481 if (ResTy == MatchOperand_Success)
483 // If there wasn't a custom match, try the generic matcher below. Otherwise,
484 // there was a match, but an error occurred, in which case, just return that
485 // the operand parsing failed.
486 if (ResTy == MatchOperand_ParseFail)
489 switch (getLexer().getKind()) {
491 Error(Parser.getTok().getLoc(), "unexpected token in operand");
493 case AsmToken::Dollar: {
495 SMLoc S = Parser.getTok().getLoc();
496 Parser.Lex(); // Eat dollar token.
497 //parse register operand
498 if (!tryParseRegisterOperand(Operands,Mnemonic)) {
499 if (getLexer().is(AsmToken::LParen)) {
500 //check if it is indexed addressing operand
501 Operands.push_back(MipsOperand::CreateToken("(", S));
502 Parser.Lex(); //eat parenthesis
503 if (getLexer().isNot(AsmToken::Dollar))
506 Parser.Lex(); //eat dollar
507 if (tryParseRegisterOperand(Operands,Mnemonic))
510 if (!getLexer().is(AsmToken::RParen))
513 S = Parser.getTok().getLoc();
514 Operands.push_back(MipsOperand::CreateToken(")", S));
519 //maybe it is a symbol reference
520 StringRef Identifier;
521 if (Parser.ParseIdentifier(Identifier))
524 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
526 MCSymbol *Sym = getContext().GetOrCreateSymbol("$" + Identifier);
528 // Otherwise create a symbol ref.
529 const MCExpr *Res = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_None,
532 Operands.push_back(MipsOperand::CreateImm(Res, S, E));
535 case AsmToken::Identifier:
536 case AsmToken::LParen:
537 case AsmToken::Minus:
539 case AsmToken::Integer:
540 case AsmToken::String: {
541 // quoted label names
543 SMLoc S = Parser.getTok().getLoc();
544 if (getParser().ParseExpression(IdVal))
546 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
547 Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
550 case AsmToken::Percent: {
551 //it is a symbol reference or constant expression
553 SMLoc S = Parser.getTok().getLoc(); //start location of the operand
554 if (parseRelocOperand(IdVal))
557 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
559 Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
561 }//case AsmToken::Percent
562 }//switch(getLexer().getKind())
566 bool MipsAsmParser::parseRelocOperand(const MCExpr *&Res) {
568 Parser.Lex(); //eat % token
569 const AsmToken &Tok = Parser.getTok(); //get next token, operation
570 if (Tok.isNot(AsmToken::Identifier))
573 std::string Str = Tok.getIdentifier().str();
575 Parser.Lex(); //eat identifier
576 //now make expression from the rest of the operand
580 if (getLexer().getKind() == AsmToken::LParen) {
582 Parser.Lex(); //eat '(' token
583 if (getLexer().getKind() == AsmToken::Percent) {
584 Parser.Lex(); //eat % token
585 const AsmToken &nextTok = Parser.getTok();
586 if (nextTok.isNot(AsmToken::Identifier))
589 Str += nextTok.getIdentifier();
590 Parser.Lex(); //eat identifier
591 if (getLexer().getKind() != AsmToken::LParen)
596 if (getParser().ParseParenExpression(IdVal,EndLoc))
599 while (getLexer().getKind() == AsmToken::RParen)
600 Parser.Lex(); //eat ')' token
603 return true; //parenthesis must follow reloc operand
605 //Check the type of the expression
606 if (const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(IdVal)) {
607 //it's a constant, evaluate lo or hi value
608 int Val = MCE->getValue();
611 } else if (Str == "hi") {
612 Val = (Val & 0xffff0000) >> 16;
614 Res = MCConstantExpr::Create(Val, getContext());
618 if (const MCSymbolRefExpr *MSRE = dyn_cast<MCSymbolRefExpr>(IdVal)) {
619 //it's a symbol, create symbolic expression from symbol
620 StringRef Symbol = MSRE->getSymbol().getName();
621 MCSymbolRefExpr::VariantKind VK = getVariantKind(Str);
622 Res = MCSymbolRefExpr::Create(Symbol,VK,getContext());
628 bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
631 StartLoc = Parser.getTok().getLoc();
632 RegNo = tryParseRegister("");
633 EndLoc = Parser.getTok().getLoc();
634 return (RegNo == (unsigned)-1);
637 bool MipsAsmParser::parseMemOffset(const MCExpr *&Res) {
641 switch(getLexer().getKind()) {
644 case AsmToken::Integer:
645 case AsmToken::Minus:
647 return (getParser().ParseExpression(Res));
648 case AsmToken::Percent:
649 return parseRelocOperand(Res);
650 case AsmToken::LParen:
651 return false; //it's probably assuming 0
656 MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand(
657 SmallVectorImpl<MCParsedAsmOperand*>&Operands) {
659 const MCExpr *IdVal = 0;
661 //first operand is the offset
662 S = Parser.getTok().getLoc();
664 if (parseMemOffset(IdVal))
665 return MatchOperand_ParseFail;
667 const AsmToken &Tok = Parser.getTok(); //get next token
668 if (Tok.isNot(AsmToken::LParen)) {
669 Error(Parser.getTok().getLoc(), "'(' expected");
670 return MatchOperand_ParseFail;
673 Parser.Lex(); // Eat '(' token.
675 const AsmToken &Tok1 = Parser.getTok(); //get next token
676 if (Tok1.is(AsmToken::Dollar)) {
677 Parser.Lex(); // Eat '$' token.
678 if (tryParseRegisterOperand(Operands,"")) {
679 Error(Parser.getTok().getLoc(), "unexpected token in operand");
680 return MatchOperand_ParseFail;
684 Error(Parser.getTok().getLoc(),"unexpected token in operand");
685 return MatchOperand_ParseFail;
688 const AsmToken &Tok2 = Parser.getTok(); //get next token
689 if (Tok2.isNot(AsmToken::RParen)) {
690 Error(Parser.getTok().getLoc(), "')' expected");
691 return MatchOperand_ParseFail;
694 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
696 Parser.Lex(); // Eat ')' token.
699 IdVal = MCConstantExpr::Create(0, getContext());
701 //now replace register operand with the mem operand
702 MipsOperand* op = static_cast<MipsOperand*>(Operands.back());
703 int RegNo = op->getReg();
704 //remove register from operands
706 //and add memory operand
707 Operands.push_back(MipsOperand::CreateMem(RegNo, IdVal, S, E));
709 return MatchOperand_Success;
712 MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) {
714 MCSymbolRefExpr::VariantKind VK
715 = StringSwitch<MCSymbolRefExpr::VariantKind>(Symbol)
716 .Case("hi", MCSymbolRefExpr::VK_Mips_ABS_HI)
717 .Case("lo", MCSymbolRefExpr::VK_Mips_ABS_LO)
718 .Case("gp_rel", MCSymbolRefExpr::VK_Mips_GPREL)
719 .Case("call16", MCSymbolRefExpr::VK_Mips_GOT_CALL)
720 .Case("got", MCSymbolRefExpr::VK_Mips_GOT)
721 .Case("tlsgd", MCSymbolRefExpr::VK_Mips_TLSGD)
722 .Case("tlsldm", MCSymbolRefExpr::VK_Mips_TLSLDM)
723 .Case("dtprel_hi", MCSymbolRefExpr::VK_Mips_DTPREL_HI)
724 .Case("dtprel_lo", MCSymbolRefExpr::VK_Mips_DTPREL_LO)
725 .Case("gottprel", MCSymbolRefExpr::VK_Mips_GOTTPREL)
726 .Case("tprel_hi", MCSymbolRefExpr::VK_Mips_TPREL_HI)
727 .Case("tprel_lo", MCSymbolRefExpr::VK_Mips_TPREL_LO)
728 .Case("got_disp", MCSymbolRefExpr::VK_Mips_GOT_DISP)
729 .Case("got_page", MCSymbolRefExpr::VK_Mips_GOT_PAGE)
730 .Case("got_ofst", MCSymbolRefExpr::VK_Mips_GOT_OFST)
731 .Case("hi(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_HI)
732 .Case("lo(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_LO)
733 .Default(MCSymbolRefExpr::VK_None);
738 int ConvertCcString(StringRef CondString){
740 int CC = StringSwitch<unsigned>(CondString)
763 parseMathOperation(StringRef Name, SMLoc NameLoc,
764 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
766 size_t Start = Name.find('.'), Next = Name.rfind('.');
767 StringRef Format1 = Name.slice(Start, Next);
768 //and add the first format to the operands
769 Operands.push_back(MipsOperand::CreateToken(Format1, NameLoc));
770 //now for the second format
771 StringRef Format2 = Name.slice(Next, StringRef::npos);
772 Operands.push_back(MipsOperand::CreateToken(Format2, NameLoc));
774 //set the format for the first register
775 setFpFormat(Format1);
777 // Read the remaining operands.
778 if (getLexer().isNot(AsmToken::EndOfStatement)) {
779 // Read the first operand.
780 if (ParseOperand(Operands, Name)) {
781 SMLoc Loc = getLexer().getLoc();
782 Parser.EatToEndOfStatement();
783 return Error(Loc, "unexpected token in argument list");
786 if (getLexer().isNot(AsmToken::Comma)) {
787 SMLoc Loc = getLexer().getLoc();
788 Parser.EatToEndOfStatement();
789 return Error(Loc, "unexpected token in argument list");
792 Parser.Lex(); // Eat the comma.
794 //set the format for the first register
795 setFpFormat(Format2);
797 // Parse and remember the operand.
798 if (ParseOperand(Operands, Name)) {
799 SMLoc Loc = getLexer().getLoc();
800 Parser.EatToEndOfStatement();
801 return Error(Loc, "unexpected token in argument list");
805 if (getLexer().isNot(AsmToken::EndOfStatement)) {
806 SMLoc Loc = getLexer().getLoc();
807 Parser.EatToEndOfStatement();
808 return Error(Loc, "unexpected token in argument list");
811 Parser.Lex(); // Consume the EndOfStatement
816 ParseInstruction(StringRef Name, SMLoc NameLoc,
817 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
818 //floating point instructions: should register be treated as double?
819 if (requestsDoubleOperand(Name)) {
820 setFpFormat(FP_FORMAT_D);
821 Operands.push_back(MipsOperand::CreateToken(Name, NameLoc));
824 setDefaultFpFormat();
825 // Create the leading tokens for the mnemonic, split by '.' characters.
826 size_t Start = 0, Next = Name.find('.');
827 StringRef Mnemonic = Name.slice(Start, Next);
829 Operands.push_back(MipsOperand::CreateToken(Mnemonic, NameLoc));
831 if (Next != StringRef::npos) {
832 //there is a format token in mnemonic
833 //StringRef Rest = Name.slice(Next, StringRef::npos);
834 size_t Dot = Name.find('.', Next+1);
835 StringRef Format = Name.slice(Next, Dot);
836 if (Dot == StringRef::npos) //only one '.' in a string, it's a format
837 Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
839 if (Name.startswith("c.")){
840 // floating point compare, add '.' and immediate represent for cc
841 Operands.push_back(MipsOperand::CreateToken(".", NameLoc));
842 int Cc = ConvertCcString(Format);
844 return Error(NameLoc, "Invalid conditional code");
846 SMLoc E = SMLoc::getFromPointer(
847 Parser.getTok().getLoc().getPointer() -1 );
848 Operands.push_back(MipsOperand::CreateImm(
849 MCConstantExpr::Create(Cc, getContext()), NameLoc, E));
851 //trunc, ceil, floor ...
852 return parseMathOperation(Name, NameLoc, Operands);
855 //the rest is a format
856 Format = Name.slice(Dot, StringRef::npos);
857 Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
864 // Read the remaining operands.
865 if (getLexer().isNot(AsmToken::EndOfStatement)) {
866 // Read the first operand.
867 if (ParseOperand(Operands, Name)) {
868 SMLoc Loc = getLexer().getLoc();
869 Parser.EatToEndOfStatement();
870 return Error(Loc, "unexpected token in argument list");
873 while (getLexer().is(AsmToken::Comma) ) {
874 Parser.Lex(); // Eat the comma.
876 // Parse and remember the operand.
877 if (ParseOperand(Operands, Name)) {
878 SMLoc Loc = getLexer().getLoc();
879 Parser.EatToEndOfStatement();
880 return Error(Loc, "unexpected token in argument list");
885 if (getLexer().isNot(AsmToken::EndOfStatement)) {
886 SMLoc Loc = getLexer().getLoc();
887 Parser.EatToEndOfStatement();
888 return Error(Loc, "unexpected token in argument list");
891 Parser.Lex(); // Consume the EndOfStatement
896 ParseDirective(AsmToken DirectiveID) {
898 if (DirectiveID.getString() == ".ent") {
899 //ignore this directive for now
904 if (DirectiveID.getString() == ".end") {
905 //ignore this directive for now
910 if (DirectiveID.getString() == ".frame") {
911 //ignore this directive for now
912 Parser.EatToEndOfStatement();
916 if (DirectiveID.getString() == ".set") {
917 //ignore this directive for now
918 Parser.EatToEndOfStatement();
922 if (DirectiveID.getString() == ".fmask") {
923 //ignore this directive for now
924 Parser.EatToEndOfStatement();
928 if (DirectiveID.getString() == ".mask") {
929 //ignore this directive for now
930 Parser.EatToEndOfStatement();
934 if (DirectiveID.getString() == ".gpword") {
935 //ignore this directive for now
936 Parser.EatToEndOfStatement();
943 extern "C" void LLVMInitializeMipsAsmParser() {
944 RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
945 RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
946 RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
947 RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);
950 #define GET_REGISTER_MATCHER
951 #define GET_MATCHER_IMPLEMENTATION
952 #include "MipsGenAsmMatcher.inc"