1 //===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the MipsAsmBackend class.
12 //===----------------------------------------------------------------------===//
15 #ifndef MIPSASMBACKEND_H
16 #define MIPSASMBACKEND_H
18 #include "MCTargetDesc/MipsFixupKinds.h"
19 #include "llvm/MC/MCAsmBackend.h"
20 #include "llvm/ADT/Triple.h"
25 struct MCFixupKindInfo;
29 class MipsAsmBackend : public MCAsmBackend {
30 Triple::OSType OSType;
31 bool IsLittle; // Big or little endian
32 bool Is64Bit; // 32 or 64 bit words
35 MipsAsmBackend(const Target &T, Triple::OSType _OSType, bool _isLittle,
37 : MCAsmBackend(), OSType(_OSType), IsLittle(_isLittle),
40 MCObjectWriter *createObjectWriter(raw_ostream &OS) const override;
42 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
43 uint64_t Value, bool IsPCRel) const override;
45 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
47 unsigned getNumFixupKinds() const override {
48 return Mips::NumTargetFixupKinds;
51 /// @name Target Relaxation Interfaces
54 /// MayNeedRelaxation - Check whether the given instruction may need
57 /// \param Inst - The instruction to test.
58 bool mayNeedRelaxation(const MCInst &Inst) const override {
62 /// fixupNeedsRelaxation - Target specific predicate for whether a given
63 /// fixup requires the associated instruction to be relaxed.
64 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
65 const MCRelaxableFragment *DF,
66 const MCAsmLayout &Layout) const override {
68 llvm_unreachable("RelaxInstruction() unimplemented");
72 /// RelaxInstruction - Relax the instruction in the given fragment
73 /// to the next wider instruction.
75 /// \param Inst - The instruction to relax, which may be the same
77 /// \param [out] Res On return, the relaxed instruction.
78 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {}
82 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
84 void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout,
85 const MCFixup &Fixup, const MCFragment *DF,
86 const MCValue &Target, uint64_t &Value,
87 bool &IsResolved) override;
89 }; // class MipsAsmBackend