1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "MipsMCTargetDesc.h"
15 #include "InstPrinter/MipsInstPrinter.h"
16 #include "MipsMCAsmInfo.h"
17 #include "MipsTargetStreamer.h"
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/MC/MCCodeGenInfo.h"
20 #include "llvm/MC/MCELFStreamer.h"
21 #include "llvm/MC/MCInstrInfo.h"
22 #include "llvm/MC/MCRegisterInfo.h"
23 #include "llvm/MC/MCSubtargetInfo.h"
24 #include "llvm/MC/MCSymbol.h"
25 #include "llvm/MC/MachineLocation.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/ErrorHandling.h"
28 #include "llvm/Support/FormattedStream.h"
29 #include "llvm/Support/TargetRegistry.h"
31 #define GET_INSTRINFO_MC_DESC
32 #include "MipsGenInstrInfo.inc"
34 #define GET_SUBTARGETINFO_MC_DESC
35 #include "MipsGenSubtargetInfo.inc"
37 #define GET_REGINFO_MC_DESC
38 #include "MipsGenRegisterInfo.inc"
42 /// Select the Mips CPU for the given triple and cpu name.
43 /// FIXME: Merge with the copy in MipsSubtarget.cpp
44 static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
45 if (CPU.empty() || CPU == "generic") {
47 if (TheTriple.getArch() == Triple::mips ||
48 TheTriple.getArch() == Triple::mipsel)
56 static MCInstrInfo *createMipsMCInstrInfo() {
57 MCInstrInfo *X = new MCInstrInfo();
58 InitMipsMCInstrInfo(X);
62 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
63 MCRegisterInfo *X = new MCRegisterInfo();
64 InitMipsMCRegisterInfo(X, Mips::RA);
68 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
70 CPU = selectMipsCPU(TT, CPU);
71 MCSubtargetInfo *X = new MCSubtargetInfo();
72 InitMipsMCSubtargetInfo(X, TT, CPU, FS);
76 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
77 MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
79 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
80 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, SP, 0);
81 MAI->addInitialFrameState(Inst);
86 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
88 CodeGenOpt::Level OL) {
89 MCCodeGenInfo *X = new MCCodeGenInfo();
90 if (CM == CodeModel::JITDefault)
92 else if (RM == Reloc::Default)
94 X->InitMCCodeGenInfo(RM, CM, OL);
98 static MCInstPrinter *createMipsMCInstPrinter(const Target &T,
99 unsigned SyntaxVariant,
100 const MCAsmInfo &MAI,
101 const MCInstrInfo &MII,
102 const MCRegisterInfo &MRI,
103 const MCSubtargetInfo &STI) {
104 return new MipsInstPrinter(MAI, MII, MRI);
107 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
108 MCContext &Context, MCAsmBackend &MAB,
109 raw_ostream &OS, MCCodeEmitter *Emitter,
110 const MCSubtargetInfo &STI,
111 bool RelaxAll, bool NoExecStack) {
113 createELFStreamer(Context, MAB, OS, Emitter, RelaxAll, NoExecStack);
114 new MipsTargetELFStreamer(*S, STI);
119 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
120 bool isVerboseAsm, bool useCFI, bool useDwarfDirectory,
121 MCInstPrinter *InstPrint, MCCodeEmitter *CE,
122 MCAsmBackend *TAB, bool ShowInst) {
124 llvm::createAsmStreamer(Ctx, OS, isVerboseAsm, useCFI, useDwarfDirectory,
125 InstPrint, CE, TAB, ShowInst);
126 new MipsTargetAsmStreamer(*S, OS);
130 extern "C" void LLVMInitializeMipsTargetMC() {
131 // Register the MC asm info.
132 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
133 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
134 RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo);
135 RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo);
137 // Register the MC codegen info.
138 TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
139 createMipsMCCodeGenInfo);
140 TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
141 createMipsMCCodeGenInfo);
142 TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target,
143 createMipsMCCodeGenInfo);
144 TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget,
145 createMipsMCCodeGenInfo);
147 // Register the MC instruction info.
148 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
149 TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
150 TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
151 TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
152 createMipsMCInstrInfo);
154 // Register the MC register info.
155 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
156 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
157 TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo);
158 TargetRegistry::RegisterMCRegInfo(TheMips64elTarget,
159 createMipsMCRegisterInfo);
161 // Register the MC Code Emitter
162 TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
163 createMipsMCCodeEmitterEB);
164 TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
165 createMipsMCCodeEmitterEL);
166 TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
167 createMipsMCCodeEmitterEB);
168 TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
169 createMipsMCCodeEmitterEL);
171 // Register the object streamer.
172 TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
173 TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
174 TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
175 TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
178 // Register the asm streamer.
179 TargetRegistry::RegisterAsmStreamer(TheMipsTarget, createMCAsmStreamer);
180 TargetRegistry::RegisterAsmStreamer(TheMipselTarget, createMCAsmStreamer);
181 TargetRegistry::RegisterAsmStreamer(TheMips64Target, createMCAsmStreamer);
182 TargetRegistry::RegisterAsmStreamer(TheMips64elTarget, createMCAsmStreamer);
184 // Register the asm backend.
185 TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
186 createMipsAsmBackendEB32);
187 TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
188 createMipsAsmBackendEL32);
189 TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
190 createMipsAsmBackendEB64);
191 TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
192 createMipsAsmBackendEL64);
194 // Register the MC subtarget info.
195 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
196 createMipsMCSubtargetInfo);
197 TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget,
198 createMipsMCSubtargetInfo);
199 TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target,
200 createMipsMCSubtargetInfo);
201 TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget,
202 createMipsMCSubtargetInfo);
204 // Register the MCInstPrinter.
205 TargetRegistry::RegisterMCInstPrinter(TheMipsTarget,
206 createMipsMCInstPrinter);
207 TargetRegistry::RegisterMCInstPrinter(TheMipselTarget,
208 createMipsMCInstPrinter);
209 TargetRegistry::RegisterMCInstPrinter(TheMips64Target,
210 createMipsMCInstPrinter);
211 TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget,
212 createMipsMCInstPrinter);