1 //===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
26 class MCSubtargetInfo;
31 extern Target TheMipsTarget;
32 extern Target TheMipselTarget;
33 extern Target TheMips64Target;
34 extern Target TheMips64elTarget;
36 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
37 const MCRegisterInfo &MRI,
39 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
40 const MCRegisterInfo &MRI,
43 MCAsmBackend *createMipsAsmBackendEB32(const Target &T,
44 const MCRegisterInfo &MRI, StringRef TT,
46 MCAsmBackend *createMipsAsmBackendEL32(const Target &T,
47 const MCRegisterInfo &MRI, StringRef TT,
49 MCAsmBackend *createMipsAsmBackendEB64(const Target &T,
50 const MCRegisterInfo &MRI, StringRef TT,
52 MCAsmBackend *createMipsAsmBackendEL64(const Target &T,
53 const MCRegisterInfo &MRI, StringRef TT,
56 MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
57 bool IsLittleEndian, bool Is64Bit);
60 StringRef selectMipsCPU(StringRef TT, StringRef CPU);
63 } // End llvm namespace
65 // Defines symbolic names for Mips registers. This defines a mapping from
66 // register name to register number.
67 #define GET_REGINFO_ENUM
68 #include "MipsGenRegisterInfo.inc"
70 // Defines symbolic names for the Mips instructions.
71 #define GET_INSTRINFO_ENUM
72 #include "MipsGenInstrInfo.inc"
74 #define GET_SUBTARGETINFO_ENUM
75 #include "MipsGenSubtargetInfo.inc"