1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsMCTargetDesc.h"
16 #include "MipsTargetObjectFile.h"
17 #include "MipsTargetStreamer.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCELF.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
30 // Pin vtable to this file.
31 void MipsTargetStreamer::anchor() {}
33 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
35 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
36 formatted_raw_ostream &OS)
37 : MipsTargetStreamer(S), OS(OS) {}
39 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
40 OS << "\t.set\tmicromips\n";
43 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
44 OS << "\t.set\tnomicromips\n";
47 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
48 OS << "\t.set\tmips16\n";
51 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
52 OS << "\t.set\tnomips16\n";
55 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
56 OS << "\t.set\treorder\n";
59 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
60 OS << "\t.set\tnoreorder\n";
63 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
64 OS << "\t.set\tmacro\n";
67 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
68 OS << "\t.set\tnomacro\n";
71 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
75 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
76 OS << "\t.set\tnoat\n";
79 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
80 OS << "\t.end\t" << Name << '\n';
83 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
84 OS << "\t.ent\t" << Symbol.getName() << '\n';
87 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
89 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
91 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
92 OS << "\t.nan\tlegacy\n";
95 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
96 OS << "\t.option\tpic0\n";
99 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
100 OS << "\t.option\tpic2\n";
103 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
104 unsigned ReturnReg) {
106 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
108 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
111 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
112 OS << "\t.set\tmips32r2\n";
115 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
116 OS << "\t.set\tmips64\n";
119 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
120 OS << "\t.set\tmips64r2\n";
123 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
124 OS << "\t.set\tdsp\n";
126 // Print a 32 bit hex number with all numbers.
127 static void printHex32(unsigned Value, raw_ostream &OS) {
129 for (int i = 7; i >= 0; i--)
130 OS.write_hex((Value & (0xF << (i*4))) >> (i*4));
133 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
134 int CPUTopSavedRegOff) {
136 printHex32(CPUBitmask, OS);
137 OS << ',' << CPUTopSavedRegOff << '\n';
140 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
141 int FPUTopSavedRegOff) {
143 printHex32(FPUBitmask, OS);
144 OS << "," << FPUTopSavedRegOff << '\n';
147 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
149 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
152 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
156 OS << "\t.cpsetup\t$"
157 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
161 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
167 OS << Sym.getName() << "\n";
170 // This part is for ELF object output.
171 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
172 const MCSubtargetInfo &STI)
173 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
174 MCAssembler &MCA = getStreamer().getAssembler();
175 uint64_t Features = STI.getFeatureBits();
176 Triple T(STI.getTargetTriple());
177 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
181 // Update e_header flags
185 if (Features & Mips::FeatureMips64r2)
186 EFlags |= ELF::EF_MIPS_ARCH_64R2;
187 else if (Features & Mips::FeatureMips64)
188 EFlags |= ELF::EF_MIPS_ARCH_64;
189 else if (Features & Mips::FeatureMips4)
190 EFlags |= ELF::EF_MIPS_ARCH_4;
191 else if (Features & Mips::FeatureMips32r2)
192 EFlags |= ELF::EF_MIPS_ARCH_32R2;
193 else if (Features & Mips::FeatureMips32)
194 EFlags |= ELF::EF_MIPS_ARCH_32;
196 if (T.isArch64Bit()) {
197 if (Features & Mips::FeatureN32)
198 EFlags |= ELF::EF_MIPS_ABI2;
199 else if (Features & Mips::FeatureO32) {
200 EFlags |= ELF::EF_MIPS_ABI_O32;
201 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
203 // No need to set any bit for N64 which is the default ABI at the moment
204 // for 64-bit Mips architectures.
206 if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
207 EFlags |= ELF::EF_MIPS_32BITMODE;
210 EFlags |= ELF::EF_MIPS_ABI_O32;
214 if (Features & Mips::FeatureNaN2008)
215 EFlags |= ELF::EF_MIPS_NAN2008;
217 MCA.setELFHeaderEFlags(EFlags);
220 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
221 if (!isMicroMipsEnabled())
223 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
224 uint8_t Type = MCELF::GetType(Data);
225 if (Type != ELF::STT_FUNC)
228 // The "other" values are stored in the last 6 bits of the second byte
229 // The traditional defines for STO values assume the full byte and thus
230 // the shift to pack it.
231 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
234 void MipsTargetELFStreamer::finish() {
235 MCAssembler &MCA = getStreamer().getAssembler();
236 MCContext &Context = MCA.getContext();
237 MCStreamer &OS = getStreamer();
238 Triple T(STI.getTargetTriple());
239 uint64_t Features = STI.getFeatureBits();
241 if (T.isArch64Bit() && (Features & Mips::FeatureN64)) {
242 const MCSectionELF *Sec = Context.getELFSection(
243 ".MIPS.options", ELF::SHT_MIPS_OPTIONS,
244 ELF::SHF_ALLOC | ELF::SHF_MIPS_NOSTRIP, SectionKind::getMetadata());
245 OS.SwitchSection(Sec);
247 OS.EmitIntValue(1, 1); // kind
248 OS.EmitIntValue(40, 1); // size
249 OS.EmitIntValue(0, 2); // section
250 OS.EmitIntValue(0, 4); // info
251 OS.EmitIntValue(0, 4); // ri_gprmask
252 OS.EmitIntValue(0, 4); // pad
253 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
254 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
255 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
256 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
257 OS.EmitIntValue(0, 8); // ri_gp_value
259 const MCSectionELF *Sec =
260 Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO, ELF::SHF_ALLOC,
261 SectionKind::getMetadata());
262 OS.SwitchSection(Sec);
264 OS.EmitIntValue(0, 4); // ri_gprmask
265 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
266 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
267 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
268 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
269 OS.EmitIntValue(0, 4); // ri_gp_value
273 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
274 const MCExpr *Value) {
275 // If on rhs is micromips symbol then mark Symbol as microMips.
276 if (Value->getKind() != MCExpr::SymbolRef)
278 const MCSymbol &RhsSym =
279 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
280 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
281 uint8_t Type = MCELF::GetType(Data);
282 if ((Type != ELF::STT_FUNC)
283 || !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
286 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
287 // The "other" values are stored in the last 6 bits of the second byte.
288 // The traditional defines for STO values assume the full byte and thus
289 // the shift to pack it.
290 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
293 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
294 return static_cast<MCELFStreamer &>(Streamer);
297 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
298 MicroMipsEnabled = true;
300 MCAssembler &MCA = getStreamer().getAssembler();
301 unsigned Flags = MCA.getELFHeaderEFlags();
302 Flags |= ELF::EF_MIPS_MICROMIPS;
303 MCA.setELFHeaderEFlags(Flags);
306 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
307 MicroMipsEnabled = false;
310 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
311 MCAssembler &MCA = getStreamer().getAssembler();
312 unsigned Flags = MCA.getELFHeaderEFlags();
313 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
314 MCA.setELFHeaderEFlags(Flags);
317 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
321 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
325 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
326 MCAssembler &MCA = getStreamer().getAssembler();
327 unsigned Flags = MCA.getELFHeaderEFlags();
328 Flags |= ELF::EF_MIPS_NOREORDER;
329 MCA.setELFHeaderEFlags(Flags);
332 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
336 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
340 void MipsTargetELFStreamer::emitDirectiveSetAt() {
344 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
348 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
352 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
356 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
357 MCAssembler &MCA = getStreamer().getAssembler();
358 unsigned Flags = MCA.getELFHeaderEFlags();
359 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
360 MCA.setELFHeaderEFlags(Flags);
363 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
364 MCAssembler &MCA = getStreamer().getAssembler();
365 unsigned Flags = MCA.getELFHeaderEFlags();
366 Flags |= ELF::EF_MIPS_NAN2008;
367 MCA.setELFHeaderEFlags(Flags);
370 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
371 MCAssembler &MCA = getStreamer().getAssembler();
372 unsigned Flags = MCA.getELFHeaderEFlags();
373 Flags &= ~ELF::EF_MIPS_NAN2008;
374 MCA.setELFHeaderEFlags(Flags);
377 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
378 MCAssembler &MCA = getStreamer().getAssembler();
379 unsigned Flags = MCA.getELFHeaderEFlags();
380 // This option overrides other PIC options like -KPIC.
382 Flags &= ~ELF::EF_MIPS_PIC;
383 MCA.setELFHeaderEFlags(Flags);
386 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
387 MCAssembler &MCA = getStreamer().getAssembler();
388 unsigned Flags = MCA.getELFHeaderEFlags();
390 // NOTE: We are following the GAS behaviour here which means the directive
391 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
392 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
393 // EF_MIPS_CPIC to be mutually exclusive.
394 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
395 MCA.setELFHeaderEFlags(Flags);
398 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
399 unsigned ReturnReg) {
403 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
404 int CPUTopSavedRegOff) {
408 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
409 int FPUTopSavedRegOff) {
413 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
414 // No action required for ELF output.
417 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
418 // No action required for ELF output.
421 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
422 // No action required for ELF output.
425 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
426 // No action required for ELF output.
429 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
431 // This directive expands to:
432 // lui $gp, %hi(_gp_disp)
433 // addui $gp, $gp, %lo(_gp_disp)
434 // addu $gp, $gp, $reg
435 // when support for position independent code is enabled.
436 if (!Pic || (isN32() || isN64()))
439 // There's a GNU extension controlled by -mno-shared that allows
440 // locally-binding symbols to be accessed using absolute addresses.
441 // This is currently not supported. When supported -mno-shared makes
442 // .cpload expand to:
443 // lui $gp, %hi(__gnu_local_gp)
444 // addiu $gp, $gp, %lo(__gnu_local_gp)
446 StringRef SymName("_gp_disp");
447 MCAssembler &MCA = getStreamer().getAssembler();
448 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
449 MCA.getOrCreateSymbolData(*GP_Disp);
452 TmpInst.setOpcode(Mips::LUi);
453 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
454 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
455 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
456 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
457 getStreamer().EmitInstruction(TmpInst, STI);
461 TmpInst.setOpcode(Mips::ADDiu);
462 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
463 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
464 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
465 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
466 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
467 getStreamer().EmitInstruction(TmpInst, STI);
471 TmpInst.setOpcode(Mips::ADDu);
472 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
473 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
474 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
475 getStreamer().EmitInstruction(TmpInst, STI);
478 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
482 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
483 if (!Pic || !(isN32() || isN64()))
486 MCAssembler &MCA = getStreamer().getAssembler();
489 // Either store the old $gp in a register or on the stack
491 // move $save, $gpreg
492 Inst.setOpcode(Mips::DADDu);
493 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
494 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
495 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
497 // sd $gpreg, offset($sp)
498 Inst.setOpcode(Mips::SD);
499 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
500 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
501 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
503 getStreamer().EmitInstruction(Inst, STI);
506 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
507 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
508 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
509 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
510 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
511 Inst.setOpcode(Mips::LUi);
512 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
513 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
514 getStreamer().EmitInstruction(Inst, STI);
517 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
518 Inst.setOpcode(Mips::ADDiu);
519 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
520 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
521 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
522 getStreamer().EmitInstruction(Inst, STI);
525 // daddu $gp, $gp, $funcreg
526 Inst.setOpcode(Mips::DADDu);
527 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
528 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
529 Inst.addOperand(MCOperand::CreateReg(RegNo));
530 getStreamer().EmitInstruction(Inst, STI);