1 Code Generation Notes for MSA
2 =============================
4 Intrinsics are lowered to SelectionDAG nodes where possible in order to enable
5 optimisation, reduce the size of the ISel matcher, and reduce repetition in
6 the implementation. In a small number of cases, this can cause different
7 (semantically equivalent) instructions to be used in place of the requested
8 instruction, even when no optimisation has taken place.
13 This section describes any quirks of instruction selection for MSA. For
14 example, two instructions might be equally valid for some given IR and one is
15 chosen in preference to the other.
18 It is not possible to emit vshf.w when the shuffle description is
19 constant since shf.w covers exactly the same cases. shf.w is used
20 instead. It is also impossible for the shuffle description to be
21 unknown at compile-time due to the definition of shufflevector in
25 It is not possible to emit ilvl.d, or pckev.d since ilvev.d covers the
26 same shuffle. ilvev.d will be emitted instead.
28 ilvr.d, ilvod.d, pckod.d:
29 It is not possible to emit ilvr.d, or pckod.d since ilvod.d covers the
30 same shuffle. ilvod.d will be emitted instead.