1 //=- MicroMips32r6InstrInfo.td - MicroMips r6 Instruction Information -*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes microMIPSr6 instructions.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
16 // Instruction Encodings
18 //===----------------------------------------------------------------------===//
19 class ADD_MMR6_ENC : ARITH_FM_MMR6<"add", 0x110>;
20 class ADDIU_MMR6_ENC : ADDI_FM_MMR6<"addiu", 0xc>;
21 class ADDU_MMR6_ENC : ARITH_FM_MMR6<"addu", 0x150>;
22 class ADDIUPC_MMR6_ENC : PCREL19_FM_MMR6<0b00>;
23 class ALUIPC_MMR6_ENC : PCREL16_FM_MMR6<0b11111>;
24 class AUIPC_MMR6_ENC : PCREL16_FM_MMR6<0b11110>;
25 class BALC_MMR6_ENC : BRANCH_OFF26_FM<0b101101>;
26 class BC_MMR6_ENC : BRANCH_OFF26_FM<0b100101>;
27 class BITSWAP_MMR6_ENC : POOL32A_BITSWAP_FM_MMR6<0b101100>;
28 class CACHE_MMR6_ENC : CACHE_PREF_FM_MMR6<0b001000, 0b0110>;
29 class JIALC_MMR6_ENC : JMP_IDX_COMPACT_FM<0b100000>;
30 class JIC_MMR6_ENC : JMP_IDX_COMPACT_FM<0b101000>;
31 class LWPC_MMR6_ENC : PCREL19_FM_MMR6<0b01>;
32 class MUL_MMR6_ENC : ARITH_FM_MMR6<"mul", 0x18>;
33 class MUH_MMR6_ENC : ARITH_FM_MMR6<"muh", 0x58>;
34 class MULU_MMR6_ENC : ARITH_FM_MMR6<"mulu", 0x98>;
35 class MUHU_MMR6_ENC : ARITH_FM_MMR6<"muhu", 0xd8>;
36 class PREF_MMR6_ENC : CACHE_PREF_FM_MMR6<0b011000, 0b0010>;
37 class SUB_MMR6_ENC : ARITH_FM_MMR6<"sub", 0x190>;
38 class SUBU_MMR6_ENC : ARITH_FM_MMR6<"subu", 0x1d0>;
40 //===----------------------------------------------------------------------===//
42 // Instruction Descriptions
44 //===----------------------------------------------------------------------===//
46 class ADD_MMR6_DESC : ArithLogicR<"add", GPR32Opnd>;
47 class ADDIU_MMR6_DESC : ArithLogicI<"addiu", simm16, GPR32Opnd>;
48 class ADDU_MMR6_DESC : ArithLogicR<"addu", GPR32Opnd>;
49 class MUL_MMR6_DESC : ArithLogicR<"mul", GPR32Opnd>;
50 class MUH_MMR6_DESC : ArithLogicR<"muh", GPR32Opnd>;
51 class MULU_MMR6_DESC : ArithLogicR<"mulu", GPR32Opnd>;
52 class MUHU_MMR6_DESC : ArithLogicR<"muhu", GPR32Opnd>;
54 class BC_MMR6_DESC_BASE<string instr_asm, DAGOperand opnd>
55 : BRANCH_DESC_BASE, MMR6Arch<instr_asm> {
56 dag InOperandList = (ins opnd:$offset);
57 dag OutOperandList = (outs);
58 string AsmString = !strconcat(instr_asm, "\t$offset");
62 class BALC_MMR6_DESC : BC_MMR6_DESC_BASE<"balc", brtarget26> {
64 list<Register> Defs = [RA];
66 class BC_MMR6_DESC : BC_MMR6_DESC_BASE<"bc", brtarget26>;
67 class SUB_MMR6_DESC : ArithLogicR<"sub", GPR32Opnd>;
68 class SUBU_MMR6_DESC : ArithLogicR<"subu", GPR32Opnd>;
70 class BITSWAP_MMR6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd>
71 : MMR6Arch<instr_asm> {
72 dag OutOperandList = (outs GPROpnd:$rd);
73 dag InOperandList = (ins GPROpnd:$rt);
74 string AsmString = !strconcat(instr_asm, "\t$rd, $rt");
75 list<dag> Pattern = [];
78 class BITSWAP_MMR6_DESC : BITSWAP_MMR6_DESC_BASE<"bitswap", GPR32Opnd>;
80 class CACHE_HINT_MMR6_DESC<string instr_asm, Operand MemOpnd,
81 RegisterOperand GPROpnd> : MMR6Arch<instr_asm> {
82 dag OutOperandList = (outs);
83 dag InOperandList = (ins MemOpnd:$addr, uimm5:$hint);
84 string AsmString = !strconcat(instr_asm, "\t$hint, $addr");
85 list<dag> Pattern = [];
86 string DecoderMethod = "DecodeCacheOpMM";
89 class CACHE_MMR6_DESC : CACHE_HINT_MMR6_DESC<"cache", mem_mm_12, GPR32Opnd>;
90 class PREF_MMR6_DESC : CACHE_HINT_MMR6_DESC<"pref", mem_mm_12, GPR32Opnd>;
92 class JMP_MMR6_IDX_COMPACT_DESC_BASE<string opstr, DAGOperand opnd,
93 RegisterOperand GPROpnd>
95 dag InOperandList = (ins GPROpnd:$rt, opnd:$offset);
96 string AsmString = !strconcat(opstr, "\t$rt, $offset");
97 list<dag> Pattern = [];
102 class JIALC_MMR6_DESC : JMP_MMR6_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
105 list<Register> Defs = [RA];
108 class JIC_MMR6_DESC : JMP_MMR6_IDX_COMPACT_DESC_BASE<"jic", jmpoffset16,
111 list<Register> Defs = [AT];
114 class ALUIPC_MMR6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd>
115 : MMR6Arch<instr_asm> {
116 dag OutOperandList = (outs GPROpnd:$rt);
117 dag InOperandList = (ins simm16:$imm);
118 string AsmString = !strconcat(instr_asm, "\t$rt, $imm");
119 list<dag> Pattern = [];
122 class ALUIPC_MMR6_DESC : ALUIPC_MMR6_DESC_BASE<"aluipc", GPR32Opnd>;
123 class AUIPC_MMR6_DESC : ALUIPC_MMR6_DESC_BASE<"auipc", GPR32Opnd>;
125 class PCREL_MMR6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
126 Operand ImmOpnd> : MMR6Arch<instr_asm> {
127 dag OutOperandList = (outs GPROpnd:$rt);
128 dag InOperandList = (ins ImmOpnd:$imm);
129 string AsmString = !strconcat(instr_asm, "\t$rt, $imm");
130 list<dag> Pattern = [];
133 class ADDIUPC_MMR6_DESC : PCREL_MMR6_DESC_BASE<"addiupc", GPR32Opnd, simm19_lsl2>;
134 class LWPC_MMR6_DESC: PCREL_MMR6_DESC_BASE<"lwpc", GPR32Opnd, simm19_lsl2>;
136 //===----------------------------------------------------------------------===//
138 // Instruction Definitions
140 //===----------------------------------------------------------------------===//
142 let DecoderNamespace = "MicroMips32r6" in {
143 def ADD_MMR6 : StdMMR6Rel, ADD_MMR6_DESC, ADD_MMR6_ENC, ISA_MICROMIPS32R6;
144 def ADDIU_MMR6 : StdMMR6Rel, ADDIU_MMR6_DESC, ADDIU_MMR6_ENC, ISA_MICROMIPS32R6;
145 def ADDU_MMR6 : StdMMR6Rel, ADDU_MMR6_DESC, ADDU_MMR6_ENC, ISA_MICROMIPS32R6;
146 def ADDIUPC_MMR6 : R6MMR6Rel, ADDIUPC_MMR6_ENC, ADDIUPC_MMR6_DESC,
148 def ALUIPC_MMR6 : R6MMR6Rel, ALUIPC_MMR6_ENC, ALUIPC_MMR6_DESC,
150 def AUIPC_MMR6 : R6MMR6Rel, AUIPC_MMR6_ENC, AUIPC_MMR6_DESC, ISA_MICROMIPS32R6;
151 def BALC_MMR6 : R6MMR6Rel, BALC_MMR6_ENC, BALC_MMR6_DESC, ISA_MICROMIPS32R6;
152 def BC_MMR6 : R6MMR6Rel, BC_MMR6_ENC, BC_MMR6_DESC, ISA_MICROMIPS32R6;
153 def BITSWAP_MMR6 : R6MMR6Rel, BITSWAP_MMR6_ENC, BITSWAP_MMR6_DESC,
155 def CACHE_MMR6 : R6MMR6Rel, CACHE_MMR6_ENC, CACHE_MMR6_DESC, ISA_MICROMIPS32R6;
156 def JIALC_MMR6 : R6MMR6Rel, JIALC_MMR6_ENC, JIALC_MMR6_DESC, ISA_MICROMIPS32R6;
157 def JIC_MMR6 : R6MMR6Rel, JIC_MMR6_ENC, JIC_MMR6_DESC, ISA_MICROMIPS32R6;
158 def LWPC_MMR6 : R6MMR6Rel, LWPC_MMR6_ENC, LWPC_MMR6_DESC, ISA_MICROMIPS32R6;
159 def MUL_MMR6 : R6MMR6Rel, MUL_MMR6_DESC, MUL_MMR6_ENC, ISA_MICROMIPS32R6;
160 def MUH_MMR6 : R6MMR6Rel, MUH_MMR6_DESC, MUH_MMR6_ENC, ISA_MICROMIPS32R6;
161 def MULU_MMR6 : R6MMR6Rel, MULU_MMR6_DESC, MULU_MMR6_ENC, ISA_MICROMIPS32R6;
162 def MUHU_MMR6 : R6MMR6Rel, MUHU_MMR6_DESC, MUHU_MMR6_ENC, ISA_MICROMIPS32R6;
163 def PREF_MMR6 : R6MMR6Rel, PREF_MMR6_ENC, PREF_MMR6_DESC, ISA_MICROMIPS32R6;
164 def SUB_MMR6 : StdMMR6Rel, SUB_MMR6_DESC, SUB_MMR6_ENC, ISA_MICROMIPS32R6;
165 def SUBU_MMR6 : StdMMR6Rel, SUBU_MMR6_DESC, SUBU_MMR6_ENC, ISA_MICROMIPS32R6;