1 //===----------------------------------------------------------------------===//
2 // MicroMIPS Base Classes
3 //===----------------------------------------------------------------------===//
6 // Base class for MicroMips instructions.
7 // This class does not depend on the instruction size.
9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
10 InstrItinClass itin, Format f> : Instruction
12 let Namespace = "Mips";
13 let DecoderNamespace = "MicroMips";
15 let OutOperandList = outs;
16 let InOperandList = ins;
18 let AsmString = asmstr;
19 let Pattern = pattern;
22 let Predicates = [InMicroMips];
28 // Base class for MicroMIPS 16-bit instructions.
30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
31 InstrItinClass itin, Format f> :
32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
36 field bits<16> SoftFail = 0;
40 //===----------------------------------------------------------------------===//
41 // MicroMIPS 16-bit Instruction Formats
42 //===----------------------------------------------------------------------===//
44 class ARITH_FM_MM16<bit funct> {
51 let Inst{15-10} = 0x01;
58 class ANDI_FM_MM16<bits<6> funct> {
65 let Inst{15-10} = funct;
71 class LOGIC_FM_MM16<bits<4> funct> {
77 let Inst{15-10} = 0x11;
78 let Inst{9-6} = funct;
83 class SHIFT_FM_MM16<bits<1> funct> {
90 let Inst{15-10} = 0x09;
93 let Inst{3-1} = shamt;
97 class ADDIUR2_FM_MM16 {
104 let Inst{15-10} = 0x1b;
111 class LOAD_STORE_FM_MM16<bits<6> op> {
117 let Inst{15-10} = op;
119 let Inst{6-4} = addr{6-4};
120 let Inst{3-0} = addr{3-0};
123 class LOAD_STORE_SP_FM_MM16<bits<6> op> {
129 let Inst{15-10} = op;
131 let Inst{4-0} = offset;
134 class ADDIUS5_FM_MM16 {
140 let Inst{15-10} = 0x13;
146 class ADDIUSP_FM_MM16 {
151 let Inst{15-10} = 0x13;
156 class MOVE_FM_MM16<bits<6> funct> {
162 let Inst{15-10} = funct;
173 let Inst{15-10} = 0x3b;
178 class JALR_FM_MM16<bits<5> op> {
183 let Inst{15-10} = 0x11;
188 class MFHILO_FM_MM16<bits<5> funct> {
193 let Inst{15-10} = 0x11;
194 let Inst{9-5} = funct;
198 class JRADDIUSP_FM_MM16<bits<5> op> {
204 let Inst{15-10} = 0x11;
209 class ADDIUR1SP_FM_MM16 {
215 let Inst{15-10} = 0x1b;
221 class BRKSDBBP16_FM_MM<bits<6> op> {
225 let Inst{15-10} = 0x11;
227 let Inst{3-0} = code_;
230 class BEQNEZ_FM_MM16<bits<6> op> {
236 let Inst{15-10} = op;
238 let Inst{6-0} = offset;
246 let Inst{15-10} = 0x33;
247 let Inst{9-0} = offset;
250 //===----------------------------------------------------------------------===//
251 // MicroMIPS 32-bit Instruction Formats
252 //===----------------------------------------------------------------------===//
255 string Arch = "micromips";
256 list<dag> Pattern = [];
259 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
266 let Inst{31-26} = op;
267 let Inst{25-21} = rt;
268 let Inst{20-16} = rs;
269 let Inst{15-11} = rd;
271 let Inst{9-0} = funct;
274 class ADDI_FM_MM<bits<6> op> : MMArch {
281 let Inst{31-26} = op;
282 let Inst{25-21} = rt;
283 let Inst{20-16} = rs;
284 let Inst{15-0} = imm16;
287 class SLTI_FM_MM<bits<6> op> : MMArch {
294 let Inst{31-26} = op;
295 let Inst{25-21} = rt;
296 let Inst{20-16} = rs;
297 let Inst{15-0} = imm16;
300 class LUI_FM_MM : MMArch {
306 let Inst{31-26} = 0x10;
307 let Inst{25-21} = 0xd;
308 let Inst{20-16} = rt;
309 let Inst{15-0} = imm16;
312 class MULT_FM_MM<bits<10> funct> : MMArch {
318 let Inst{31-26} = 0x00;
319 let Inst{25-21} = rt;
320 let Inst{20-16} = rs;
321 let Inst{15-6} = funct;
322 let Inst{5-0} = 0x3c;
325 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
333 let Inst{25-21} = rd;
334 let Inst{20-16} = rt;
335 let Inst{15-11} = shamt;
336 let Inst{10} = rotate;
337 let Inst{9-0} = funct;
340 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
348 let Inst{25-21} = rt;
349 let Inst{20-16} = rs;
350 let Inst{15-11} = rd;
351 let Inst{10} = rotate;
352 let Inst{9-0} = funct;
355 class LW_FM_MM<bits<6> op> : MMArch {
361 let Inst{31-26} = op;
362 let Inst{25-21} = rt;
363 let Inst{20-16} = addr{20-16};
364 let Inst{15-0} = addr{15-0};
367 class LWL_FM_MM<bits<4> funct> {
373 let Inst{31-26} = 0x18;
374 let Inst{25-21} = rt;
375 let Inst{20-16} = addr{20-16};
376 let Inst{15-12} = funct;
377 let Inst{11-0} = addr{11-0};
380 class CMov_F_I_FM_MM<bits<7> func> : MMArch {
387 let Inst{31-26} = 0x15;
388 let Inst{25-21} = rd;
389 let Inst{20-16} = rs;
390 let Inst{15-13} = fcc;
391 let Inst{12-6} = func;
392 let Inst{5-0} = 0x3b;
395 class MTLO_FM_MM<bits<10> funct> : MMArch {
400 let Inst{31-26} = 0x00;
401 let Inst{25-21} = 0x00;
402 let Inst{20-16} = rs;
403 let Inst{15-6} = funct;
404 let Inst{5-0} = 0x3c;
407 class MFLO_FM_MM<bits<10> funct> : MMArch {
412 let Inst{31-26} = 0x00;
413 let Inst{25-21} = 0x00;
414 let Inst{20-16} = rd;
415 let Inst{15-6} = funct;
416 let Inst{5-0} = 0x3c;
419 class CLO_FM_MM<bits<10> funct> : MMArch {
425 let Inst{31-26} = 0x00;
426 let Inst{25-21} = rd;
427 let Inst{20-16} = rs;
428 let Inst{15-6} = funct;
429 let Inst{5-0} = 0x3c;
432 class SEB_FM_MM<bits<10> funct> : MMArch {
438 let Inst{31-26} = 0x00;
439 let Inst{25-21} = rd;
440 let Inst{20-16} = rt;
441 let Inst{15-6} = funct;
442 let Inst{5-0} = 0x3c;
445 class EXT_FM_MM<bits<6> funct> : MMArch {
453 let Inst{31-26} = 0x00;
454 let Inst{25-21} = rt;
455 let Inst{20-16} = rs;
456 let Inst{15-11} = size;
457 let Inst{10-6} = pos;
458 let Inst{5-0} = funct;
461 class J_FM_MM<bits<6> op> : MMArch {
466 let Inst{31-26} = op;
467 let Inst{25-0} = target;
470 class JR_FM_MM<bits<8> funct> : MMArch {
475 let Inst{31-21} = 0x00;
476 let Inst{20-16} = rs;
477 let Inst{15-14} = 0x0;
478 let Inst{13-6} = funct;
479 let Inst{5-0} = 0x3c;
482 class JALR_FM_MM<bits<10> funct> {
488 let Inst{31-26} = 0x00;
489 let Inst{25-21} = rd;
490 let Inst{20-16} = rs;
491 let Inst{15-6} = funct;
492 let Inst{5-0} = 0x3c;
495 class BEQ_FM_MM<bits<6> op> : MMArch {
502 let Inst{31-26} = op;
503 let Inst{25-21} = rt;
504 let Inst{20-16} = rs;
505 let Inst{15-0} = offset;
508 class BGEZ_FM_MM<bits<5> funct> : MMArch {
514 let Inst{31-26} = 0x10;
515 let Inst{25-21} = funct;
516 let Inst{20-16} = rs;
517 let Inst{15-0} = offset;
520 class BGEZAL_FM_MM<bits<5> funct> : MMArch {
526 let Inst{31-26} = 0x10;
527 let Inst{25-21} = funct;
528 let Inst{20-16} = rs;
529 let Inst{15-0} = offset;
532 class SYNC_FM_MM : MMArch {
537 let Inst{31-26} = 0x00;
538 let Inst{25-21} = 0x0;
539 let Inst{20-16} = stype;
540 let Inst{15-6} = 0x1ad;
541 let Inst{5-0} = 0x3c;
544 class BRK_FM_MM : MMArch {
548 let Inst{31-26} = 0x0;
549 let Inst{25-16} = code_1;
550 let Inst{15-6} = code_2;
551 let Inst{5-0} = 0x07;
554 class SYS_FM_MM : MMArch {
557 let Inst{31-26} = 0x0;
558 let Inst{25-16} = code_;
559 let Inst{15-6} = 0x22d;
560 let Inst{5-0} = 0x3c;
567 let Inst{31-26} = 0x00;
568 let Inst{25-16} = code_;
569 let Inst{15-6} = 0x24d;
570 let Inst{5-0} = 0x3c;
573 class ER_FM_MM<bits<10> funct> : MMArch {
576 let Inst{31-26} = 0x00;
577 let Inst{25-16} = 0x00;
578 let Inst{15-6} = funct;
579 let Inst{5-0} = 0x3c;
582 class EI_FM_MM<bits<10> funct> : MMArch {
586 let Inst{31-26} = 0x00;
587 let Inst{25-21} = 0x00;
588 let Inst{20-16} = rt;
589 let Inst{15-6} = funct;
590 let Inst{5-0} = 0x3c;
593 class TEQ_FM_MM<bits<6> funct> : MMArch {
600 let Inst{31-26} = 0x00;
601 let Inst{25-21} = rt;
602 let Inst{20-16} = rs;
603 let Inst{15-12} = code_;
604 let Inst{11-6} = funct;
605 let Inst{5-0} = 0x3c;
608 class TEQI_FM_MM<bits<5> funct> : MMArch {
614 let Inst{31-26} = 0x10;
615 let Inst{25-21} = funct;
616 let Inst{20-16} = rs;
617 let Inst{15-0} = imm16;
620 class LL_FM_MM<bits<4> funct> {
626 let Inst{31-26} = 0x18;
627 let Inst{25-21} = rt;
628 let Inst{20-16} = addr{20-16};
629 let Inst{15-12} = funct;
630 let Inst{11-0} = addr{11-0};
633 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
640 let Inst{31-26} = 0x15;
641 let Inst{25-21} = ft;
642 let Inst{20-16} = fs;
643 let Inst{15-11} = fd;
646 let Inst{7-0} = funct;
648 list<dag> Pattern = [];
651 class LWXC1_FM_MM<bits<9> funct> : MMArch {
658 let Inst{31-26} = 0x15;
659 let Inst{25-21} = index;
660 let Inst{20-16} = base;
661 let Inst{15-11} = fd;
662 let Inst{10-9} = 0x0;
663 let Inst{8-0} = funct;
666 class SWXC1_FM_MM<bits<9> funct> : MMArch {
673 let Inst{31-26} = 0x15;
674 let Inst{25-21} = index;
675 let Inst{20-16} = base;
676 let Inst{15-11} = fs;
677 let Inst{10-9} = 0x0;
678 let Inst{8-0} = funct;
681 class CEQS_FM_MM<bits<2> fmt> : MMArch {
688 let Inst{31-26} = 0x15;
689 let Inst{25-21} = ft;
690 let Inst{20-16} = fs;
691 let Inst{15-13} = 0x0; // cc
693 let Inst{11-10} = fmt;
694 let Inst{9-6} = cond;
695 let Inst{5-0} = 0x3c;
698 class BC1F_FM_MM<bits<5> tf> : MMArch {
703 let Inst{31-26} = 0x10;
704 let Inst{25-21} = tf;
705 let Inst{20-18} = 0x0; // cc
706 let Inst{17-16} = 0x0;
707 let Inst{15-0} = offset;
710 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
716 let Inst{31-26} = 0x15;
717 let Inst{25-21} = fd;
718 let Inst{20-16} = fs;
721 let Inst{13-6} = funct;
722 let Inst{5-0} = 0x3b;
725 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
731 let Inst{31-26} = 0x15;
732 let Inst{25-21} = fd;
733 let Inst{20-16} = fs;
735 let Inst{14-13} = fmt;
736 let Inst{12-6} = funct;
737 let Inst{5-0} = 0x3b;
740 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
746 let Inst{31-26} = 0x15;
747 let Inst{25-21} = fd;
748 let Inst{20-16} = fs;
749 let Inst{15-13} = 0x0; //cc
750 let Inst{12-11} = 0x0;
751 let Inst{10-9} = fmt;
752 let Inst{8-0} = func;
755 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
762 let Inst{31-26} = 0x15;
763 let Inst{25-21} = rt;
764 let Inst{20-16} = fs;
765 let Inst{15-11} = fd;
767 let Inst{7-0} = funct;
770 class MFC1_FM_MM<bits<8> funct> : MMArch {
776 let Inst{31-26} = 0x15;
777 let Inst{25-21} = rt;
778 let Inst{20-16} = fs;
779 let Inst{15-14} = 0x0;
780 let Inst{13-6} = funct;
781 let Inst{5-0} = 0x3b;
784 class MADDS_FM_MM<bits<6> funct>: MMArch {
792 let Inst{31-26} = 0x15;
793 let Inst{25-21} = ft;
794 let Inst{20-16} = fs;
795 let Inst{15-11} = fd;
797 let Inst{5-0} = funct;
800 class COMPACT_BRANCH_FM_MM<bits<5> funct> {
806 let Inst{31-26} = 0x10;
807 let Inst{25-21} = funct;
808 let Inst{20-16} = rs;
809 let Inst{15-0} = offset;
812 class COP0_TLB_FM_MM<bits<10> op> : MMArch {
815 let Inst{31-26} = 0x0;
816 let Inst{25-16} = 0x0;
818 let Inst{5-0} = 0x3c;
821 class SDBBP_FM_MM : MMArch {
826 let Inst{31-26} = 0x0;
827 let Inst{25-16} = code_;
828 let Inst{15-6} = 0x36d;
829 let Inst{5-0} = 0x3c;
832 class RDHWR_FM_MM : MMArch {
838 let Inst{31-26} = 0x0;
839 let Inst{25-21} = rt;
840 let Inst{20-16} = rd;
841 let Inst{15-6} = 0x1ac;
842 let Inst{5-0} = 0x3c;
845 class LWXS_FM_MM<bits<10> funct> {
852 let Inst{31-26} = 0x0;
853 let Inst{25-21} = index;
854 let Inst{20-16} = base;
855 let Inst{15-11} = rd;
857 let Inst{9-0} = funct;
860 class LWM_FM_MM<bits<4> funct> : MMArch {
866 let Inst{31-26} = 0x8;
867 let Inst{25-21} = rt;
868 let Inst{20-16} = addr{20-16};
869 let Inst{15-12} = funct;
870 let Inst{11-0} = addr{11-0};
873 class LWM_FM_MM16<bits<4> funct> : MMArch {
879 let Inst{15-10} = 0x11;
880 let Inst{9-6} = funct;
882 let Inst{3-0} = addr;
885 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
888 bits<5> base = addr{20-16};
889 bits<12> offset = addr{11-0};
893 let Inst{31-26} = op;
894 let Inst{25-21} = hint;
895 let Inst{20-16} = base;
896 let Inst{15-12} = funct;
897 let Inst{11-0} = offset;
900 class BARRIER_FM_MM<bits<5> op> : MMArch {
903 let Inst{31-26} = 0x0;
904 let Inst{25-21} = 0x0;
905 let Inst{20-16} = 0x0;
906 let Inst{15-11} = op;
907 let Inst{10-6} = 0x0;
911 class ADDIUPC_FM_MM {
917 let Inst{31-26} = 0x1e;
918 let Inst{25-23} = rs;
919 let Inst{22-0} = imm;