1 //===----------------------------------------------------------------------===//
2 // MicroMIPS Base Classes
3 //===----------------------------------------------------------------------===//
6 // Base class for MicroMips instructions.
7 // This class does not depend on the instruction size.
9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
10 InstrItinClass itin, Format f> : Instruction
12 let Namespace = "Mips";
13 let DecoderNamespace = "MicroMips";
15 let OutOperandList = outs;
16 let InOperandList = ins;
18 let AsmString = asmstr;
19 let Pattern = pattern;
22 let Predicates = [InMicroMips];
28 // Base class for MicroMIPS 16-bit instructions.
30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
31 InstrItinClass itin, Format f> :
32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
36 field bits<16> SoftFail = 0;
40 //===----------------------------------------------------------------------===//
41 // MicroMIPS 16-bit Instruction Formats
42 //===----------------------------------------------------------------------===//
44 class ARITH_FM_MM16<bit funct> {
51 let Inst{15-10} = 0x01;
58 class ANDI_FM_MM16<bits<6> funct> {
65 let Inst{15-10} = funct;
71 class LOGIC_FM_MM16<bits<4> funct> {
77 let Inst{15-10} = 0x11;
78 let Inst{9-6} = funct;
83 class SHIFT_FM_MM16<bits<1> funct> {
90 let Inst{15-10} = 0x09;
93 let Inst{3-1} = shamt;
97 class ADDIUR2_FM_MM16 {
104 let Inst{15-10} = 0x1b;
111 class LOAD_STORE_FM_MM16<bits<6> op> {
117 let Inst{15-10} = op;
119 let Inst{6-4} = addr{6-4};
120 let Inst{3-0} = addr{3-0};
123 class LOAD_STORE_SP_FM_MM16<bits<6> op> {
129 let Inst{15-10} = op;
131 let Inst{4-0} = offset;
134 class LOAD_GP_FM_MM16<bits<6> op> {
140 let Inst{15-10} = op;
142 let Inst{6-0} = offset;
145 class ADDIUS5_FM_MM16 {
151 let Inst{15-10} = 0x13;
157 class ADDIUSP_FM_MM16 {
162 let Inst{15-10} = 0x13;
167 class MOVE_FM_MM16<bits<6> funct> {
173 let Inst{15-10} = funct;
184 let Inst{15-10} = 0x3b;
189 class JALR_FM_MM16<bits<5> op> {
194 let Inst{15-10} = 0x11;
199 class MFHILO_FM_MM16<bits<5> funct> {
204 let Inst{15-10} = 0x11;
205 let Inst{9-5} = funct;
209 class JRADDIUSP_FM_MM16<bits<5> op> {
215 let Inst{15-10} = 0x11;
220 class ADDIUR1SP_FM_MM16 {
226 let Inst{15-10} = 0x1b;
232 class BRKSDBBP16_FM_MM<bits<6> op> {
236 let Inst{15-10} = 0x11;
238 let Inst{3-0} = code_;
241 class BEQNEZ_FM_MM16<bits<6> op> {
247 let Inst{15-10} = op;
249 let Inst{6-0} = offset;
257 let Inst{15-10} = 0x33;
258 let Inst{9-0} = offset;
261 //===----------------------------------------------------------------------===//
262 // MicroMIPS 32-bit Instruction Formats
263 //===----------------------------------------------------------------------===//
266 string Arch = "micromips";
267 list<dag> Pattern = [];
270 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
277 let Inst{31-26} = op;
278 let Inst{25-21} = rt;
279 let Inst{20-16} = rs;
280 let Inst{15-11} = rd;
282 let Inst{9-0} = funct;
285 class ADDI_FM_MM<bits<6> op> : MMArch {
292 let Inst{31-26} = op;
293 let Inst{25-21} = rt;
294 let Inst{20-16} = rs;
295 let Inst{15-0} = imm16;
298 class SLTI_FM_MM<bits<6> op> : MMArch {
305 let Inst{31-26} = op;
306 let Inst{25-21} = rt;
307 let Inst{20-16} = rs;
308 let Inst{15-0} = imm16;
311 class LUI_FM_MM : MMArch {
317 let Inst{31-26} = 0x10;
318 let Inst{25-21} = 0xd;
319 let Inst{20-16} = rt;
320 let Inst{15-0} = imm16;
323 class MULT_FM_MM<bits<10> funct> : MMArch {
329 let Inst{31-26} = 0x00;
330 let Inst{25-21} = rt;
331 let Inst{20-16} = rs;
332 let Inst{15-6} = funct;
333 let Inst{5-0} = 0x3c;
336 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
344 let Inst{25-21} = rd;
345 let Inst{20-16} = rt;
346 let Inst{15-11} = shamt;
347 let Inst{10} = rotate;
348 let Inst{9-0} = funct;
351 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
359 let Inst{25-21} = rt;
360 let Inst{20-16} = rs;
361 let Inst{15-11} = rd;
362 let Inst{10} = rotate;
363 let Inst{9-0} = funct;
366 class LW_FM_MM<bits<6> op> : MMArch {
372 let Inst{31-26} = op;
373 let Inst{25-21} = rt;
374 let Inst{20-16} = addr{20-16};
375 let Inst{15-0} = addr{15-0};
378 class LWL_FM_MM<bits<4> funct> {
384 let Inst{31-26} = 0x18;
385 let Inst{25-21} = rt;
386 let Inst{20-16} = addr{20-16};
387 let Inst{15-12} = funct;
388 let Inst{11-0} = addr{11-0};
391 class CMov_F_I_FM_MM<bits<7> func> : MMArch {
398 let Inst{31-26} = 0x15;
399 let Inst{25-21} = rd;
400 let Inst{20-16} = rs;
401 let Inst{15-13} = fcc;
402 let Inst{12-6} = func;
403 let Inst{5-0} = 0x3b;
406 class MTLO_FM_MM<bits<10> funct> : MMArch {
411 let Inst{31-26} = 0x00;
412 let Inst{25-21} = 0x00;
413 let Inst{20-16} = rs;
414 let Inst{15-6} = funct;
415 let Inst{5-0} = 0x3c;
418 class MFLO_FM_MM<bits<10> funct> : MMArch {
423 let Inst{31-26} = 0x00;
424 let Inst{25-21} = 0x00;
425 let Inst{20-16} = rd;
426 let Inst{15-6} = funct;
427 let Inst{5-0} = 0x3c;
430 class CLO_FM_MM<bits<10> funct> : MMArch {
436 let Inst{31-26} = 0x00;
437 let Inst{25-21} = rd;
438 let Inst{20-16} = rs;
439 let Inst{15-6} = funct;
440 let Inst{5-0} = 0x3c;
443 class SEB_FM_MM<bits<10> funct> : MMArch {
449 let Inst{31-26} = 0x00;
450 let Inst{25-21} = rd;
451 let Inst{20-16} = rt;
452 let Inst{15-6} = funct;
453 let Inst{5-0} = 0x3c;
456 class EXT_FM_MM<bits<6> funct> : MMArch {
464 let Inst{31-26} = 0x00;
465 let Inst{25-21} = rt;
466 let Inst{20-16} = rs;
467 let Inst{15-11} = size;
468 let Inst{10-6} = pos;
469 let Inst{5-0} = funct;
472 class J_FM_MM<bits<6> op> : MMArch {
477 let Inst{31-26} = op;
478 let Inst{25-0} = target;
481 class JR_FM_MM<bits<8> funct> : MMArch {
486 let Inst{31-21} = 0x00;
487 let Inst{20-16} = rs;
488 let Inst{15-14} = 0x0;
489 let Inst{13-6} = funct;
490 let Inst{5-0} = 0x3c;
493 class JALR_FM_MM<bits<10> funct> {
499 let Inst{31-26} = 0x00;
500 let Inst{25-21} = rd;
501 let Inst{20-16} = rs;
502 let Inst{15-6} = funct;
503 let Inst{5-0} = 0x3c;
506 class BEQ_FM_MM<bits<6> op> : MMArch {
513 let Inst{31-26} = op;
514 let Inst{25-21} = rt;
515 let Inst{20-16} = rs;
516 let Inst{15-0} = offset;
519 class BGEZ_FM_MM<bits<5> funct> : MMArch {
525 let Inst{31-26} = 0x10;
526 let Inst{25-21} = funct;
527 let Inst{20-16} = rs;
528 let Inst{15-0} = offset;
531 class BGEZAL_FM_MM<bits<5> funct> : MMArch {
537 let Inst{31-26} = 0x10;
538 let Inst{25-21} = funct;
539 let Inst{20-16} = rs;
540 let Inst{15-0} = offset;
543 class SYNC_FM_MM : MMArch {
548 let Inst{31-26} = 0x00;
549 let Inst{25-21} = 0x0;
550 let Inst{20-16} = stype;
551 let Inst{15-6} = 0x1ad;
552 let Inst{5-0} = 0x3c;
555 class BRK_FM_MM : MMArch {
559 let Inst{31-26} = 0x0;
560 let Inst{25-16} = code_1;
561 let Inst{15-6} = code_2;
562 let Inst{5-0} = 0x07;
565 class SYS_FM_MM : MMArch {
568 let Inst{31-26} = 0x0;
569 let Inst{25-16} = code_;
570 let Inst{15-6} = 0x22d;
571 let Inst{5-0} = 0x3c;
578 let Inst{31-26} = 0x00;
579 let Inst{25-16} = code_;
580 let Inst{15-6} = 0x24d;
581 let Inst{5-0} = 0x3c;
584 class ER_FM_MM<bits<10> funct> : MMArch {
587 let Inst{31-26} = 0x00;
588 let Inst{25-16} = 0x00;
589 let Inst{15-6} = funct;
590 let Inst{5-0} = 0x3c;
593 class EI_FM_MM<bits<10> funct> : MMArch {
597 let Inst{31-26} = 0x00;
598 let Inst{25-21} = 0x00;
599 let Inst{20-16} = rt;
600 let Inst{15-6} = funct;
601 let Inst{5-0} = 0x3c;
604 class TEQ_FM_MM<bits<6> funct> : MMArch {
611 let Inst{31-26} = 0x00;
612 let Inst{25-21} = rt;
613 let Inst{20-16} = rs;
614 let Inst{15-12} = code_;
615 let Inst{11-6} = funct;
616 let Inst{5-0} = 0x3c;
619 class TEQI_FM_MM<bits<5> funct> : MMArch {
625 let Inst{31-26} = 0x10;
626 let Inst{25-21} = funct;
627 let Inst{20-16} = rs;
628 let Inst{15-0} = imm16;
631 class LL_FM_MM<bits<4> funct> {
637 let Inst{31-26} = 0x18;
638 let Inst{25-21} = rt;
639 let Inst{20-16} = addr{20-16};
640 let Inst{15-12} = funct;
641 let Inst{11-0} = addr{11-0};
644 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
651 let Inst{31-26} = 0x15;
652 let Inst{25-21} = ft;
653 let Inst{20-16} = fs;
654 let Inst{15-11} = fd;
657 let Inst{7-0} = funct;
659 list<dag> Pattern = [];
662 class LWXC1_FM_MM<bits<9> funct> : MMArch {
669 let Inst{31-26} = 0x15;
670 let Inst{25-21} = index;
671 let Inst{20-16} = base;
672 let Inst{15-11} = fd;
673 let Inst{10-9} = 0x0;
674 let Inst{8-0} = funct;
677 class SWXC1_FM_MM<bits<9> funct> : MMArch {
684 let Inst{31-26} = 0x15;
685 let Inst{25-21} = index;
686 let Inst{20-16} = base;
687 let Inst{15-11} = fs;
688 let Inst{10-9} = 0x0;
689 let Inst{8-0} = funct;
692 class CEQS_FM_MM<bits<2> fmt> : MMArch {
699 let Inst{31-26} = 0x15;
700 let Inst{25-21} = ft;
701 let Inst{20-16} = fs;
702 let Inst{15-13} = 0x0; // cc
704 let Inst{11-10} = fmt;
705 let Inst{9-6} = cond;
706 let Inst{5-0} = 0x3c;
709 class BC1F_FM_MM<bits<5> tf> : MMArch {
714 let Inst{31-26} = 0x10;
715 let Inst{25-21} = tf;
716 let Inst{20-18} = 0x0; // cc
717 let Inst{17-16} = 0x0;
718 let Inst{15-0} = offset;
721 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
727 let Inst{31-26} = 0x15;
728 let Inst{25-21} = fd;
729 let Inst{20-16} = fs;
732 let Inst{13-6} = funct;
733 let Inst{5-0} = 0x3b;
736 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
742 let Inst{31-26} = 0x15;
743 let Inst{25-21} = fd;
744 let Inst{20-16} = fs;
746 let Inst{14-13} = fmt;
747 let Inst{12-6} = funct;
748 let Inst{5-0} = 0x3b;
751 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
757 let Inst{31-26} = 0x15;
758 let Inst{25-21} = fd;
759 let Inst{20-16} = fs;
760 let Inst{15-13} = 0x0; //cc
761 let Inst{12-11} = 0x0;
762 let Inst{10-9} = fmt;
763 let Inst{8-0} = func;
766 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
773 let Inst{31-26} = 0x15;
774 let Inst{25-21} = rt;
775 let Inst{20-16} = fs;
776 let Inst{15-11} = fd;
778 let Inst{7-0} = funct;
781 class MFC1_FM_MM<bits<8> funct> : MMArch {
787 let Inst{31-26} = 0x15;
788 let Inst{25-21} = rt;
789 let Inst{20-16} = fs;
790 let Inst{15-14} = 0x0;
791 let Inst{13-6} = funct;
792 let Inst{5-0} = 0x3b;
795 class MADDS_FM_MM<bits<6> funct>: MMArch {
803 let Inst{31-26} = 0x15;
804 let Inst{25-21} = ft;
805 let Inst{20-16} = fs;
806 let Inst{15-11} = fd;
808 let Inst{5-0} = funct;
811 class COMPACT_BRANCH_FM_MM<bits<5> funct> {
817 let Inst{31-26} = 0x10;
818 let Inst{25-21} = funct;
819 let Inst{20-16} = rs;
820 let Inst{15-0} = offset;
823 class COP0_TLB_FM_MM<bits<10> op> : MMArch {
826 let Inst{31-26} = 0x0;
827 let Inst{25-16} = 0x0;
829 let Inst{5-0} = 0x3c;
832 class SDBBP_FM_MM : MMArch {
837 let Inst{31-26} = 0x0;
838 let Inst{25-16} = code_;
839 let Inst{15-6} = 0x36d;
840 let Inst{5-0} = 0x3c;
843 class RDHWR_FM_MM : MMArch {
849 let Inst{31-26} = 0x0;
850 let Inst{25-21} = rt;
851 let Inst{20-16} = rd;
852 let Inst{15-6} = 0x1ac;
853 let Inst{5-0} = 0x3c;
856 class LWXS_FM_MM<bits<10> funct> {
863 let Inst{31-26} = 0x0;
864 let Inst{25-21} = index;
865 let Inst{20-16} = base;
866 let Inst{15-11} = rd;
868 let Inst{9-0} = funct;
871 class LWM_FM_MM<bits<4> funct> : MMArch {
877 let Inst{31-26} = 0x8;
878 let Inst{25-21} = rt;
879 let Inst{20-16} = addr{20-16};
880 let Inst{15-12} = funct;
881 let Inst{11-0} = addr{11-0};
884 class LWM_FM_MM16<bits<4> funct> : MMArch {
890 let Inst{15-10} = 0x11;
891 let Inst{9-6} = funct;
893 let Inst{3-0} = addr;
896 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
899 bits<5> base = addr{20-16};
900 bits<12> offset = addr{11-0};
904 let Inst{31-26} = op;
905 let Inst{25-21} = hint;
906 let Inst{20-16} = base;
907 let Inst{15-12} = funct;
908 let Inst{11-0} = offset;
911 class BARRIER_FM_MM<bits<5> op> : MMArch {
914 let Inst{31-26} = 0x0;
915 let Inst{25-21} = 0x0;
916 let Inst{20-16} = 0x0;
917 let Inst{15-11} = op;
918 let Inst{10-6} = 0x0;
922 class ADDIUPC_FM_MM {
928 let Inst{31-26} = 0x1e;
929 let Inst{25-23} = rs;
930 let Inst{22-0} = imm;