1 //===----------------------------------------------------------------------===//
2 // MicroMIPS Base Classes
3 //===----------------------------------------------------------------------===//
6 // Base class for MicroMips instructions.
7 // This class does not depend on the instruction size.
9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
10 InstrItinClass itin, Format f> : Instruction
12 let Namespace = "Mips";
13 let DecoderNamespace = "MicroMips";
15 let OutOperandList = outs;
16 let InOperandList = ins;
18 let AsmString = asmstr;
19 let Pattern = pattern;
22 let Predicates = [InMicroMips];
28 // Base class for MicroMIPS 16-bit instructions.
30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
31 InstrItinClass itin, Format f> :
32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
36 field bits<16> SoftFail = 0;
40 //===----------------------------------------------------------------------===//
41 // MicroMIPS 16-bit Instruction Formats
42 //===----------------------------------------------------------------------===//
44 class ARITH_FM_MM16<bit funct> {
51 let Inst{15-10} = 0x01;
58 class ANDI_FM_MM16<bits<6> funct> {
65 let Inst{15-10} = funct;
71 class LOGIC_FM_MM16<bits<4> funct> {
77 let Inst{15-10} = 0x11;
78 let Inst{9-6} = funct;
83 class SHIFT_FM_MM16<bits<1> funct> {
90 let Inst{15-10} = 0x09;
93 let Inst{3-1} = shamt;
97 class ADDIUR2_FM_MM16 {
104 let Inst{15-10} = 0x1b;
111 class LOAD_STORE_FM_MM16<bits<6> op> {
117 let Inst{15-10} = op;
119 let Inst{6-4} = addr{6-4};
120 let Inst{3-0} = addr{3-0};
123 class LOAD_STORE_SP_FM_MM16<bits<6> op> {
129 let Inst{15-10} = op;
131 let Inst{4-0} = offset;
134 class ADDIUS5_FM_MM16 {
140 let Inst{15-10} = 0x13;
146 class ADDIUSP_FM_MM16 {
151 let Inst{15-10} = 0x13;
156 class MOVE_FM_MM16<bits<6> funct> {
162 let Inst{15-10} = funct;
173 let Inst{15-10} = 0x3b;
178 class JALR_FM_MM16<bits<5> op> {
183 let Inst{15-10} = 0x11;
188 class MFHILO_FM_MM16<bits<5> funct> {
193 let Inst{15-10} = 0x11;
194 let Inst{9-5} = funct;
198 class JRADDIUSP_FM_MM16<bits<5> op> {
204 let Inst{15-10} = 0x11;
209 class ADDIUR1SP_FM_MM16 {
215 let Inst{15-10} = 0x1b;
221 class BRKSDBBP16_FM_MM<bits<6> op> {
225 let Inst{15-10} = 0x11;
227 let Inst{3-0} = code_;
230 class BEQNEZ_FM_MM16<bits<6> op> {
236 let Inst{15-10} = op;
238 let Inst{6-0} = offset;
241 //===----------------------------------------------------------------------===//
242 // MicroMIPS 32-bit Instruction Formats
243 //===----------------------------------------------------------------------===//
246 string Arch = "micromips";
247 list<dag> Pattern = [];
250 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
257 let Inst{31-26} = op;
258 let Inst{25-21} = rt;
259 let Inst{20-16} = rs;
260 let Inst{15-11} = rd;
262 let Inst{9-0} = funct;
265 class ADDI_FM_MM<bits<6> op> : MMArch {
272 let Inst{31-26} = op;
273 let Inst{25-21} = rt;
274 let Inst{20-16} = rs;
275 let Inst{15-0} = imm16;
278 class SLTI_FM_MM<bits<6> op> : MMArch {
285 let Inst{31-26} = op;
286 let Inst{25-21} = rt;
287 let Inst{20-16} = rs;
288 let Inst{15-0} = imm16;
291 class LUI_FM_MM : MMArch {
297 let Inst{31-26} = 0x10;
298 let Inst{25-21} = 0xd;
299 let Inst{20-16} = rt;
300 let Inst{15-0} = imm16;
303 class MULT_FM_MM<bits<10> funct> : MMArch {
309 let Inst{31-26} = 0x00;
310 let Inst{25-21} = rt;
311 let Inst{20-16} = rs;
312 let Inst{15-6} = funct;
313 let Inst{5-0} = 0x3c;
316 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
324 let Inst{25-21} = rd;
325 let Inst{20-16} = rt;
326 let Inst{15-11} = shamt;
327 let Inst{10} = rotate;
328 let Inst{9-0} = funct;
331 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
339 let Inst{25-21} = rt;
340 let Inst{20-16} = rs;
341 let Inst{15-11} = rd;
342 let Inst{10} = rotate;
343 let Inst{9-0} = funct;
346 class LW_FM_MM<bits<6> op> : MMArch {
352 let Inst{31-26} = op;
353 let Inst{25-21} = rt;
354 let Inst{20-16} = addr{20-16};
355 let Inst{15-0} = addr{15-0};
358 class LWL_FM_MM<bits<4> funct> {
364 let Inst{31-26} = 0x18;
365 let Inst{25-21} = rt;
366 let Inst{20-16} = addr{20-16};
367 let Inst{15-12} = funct;
368 let Inst{11-0} = addr{11-0};
371 class CMov_F_I_FM_MM<bits<7> func> : MMArch {
378 let Inst{31-26} = 0x15;
379 let Inst{25-21} = rd;
380 let Inst{20-16} = rs;
381 let Inst{15-13} = fcc;
382 let Inst{12-6} = func;
383 let Inst{5-0} = 0x3b;
386 class MTLO_FM_MM<bits<10> funct> : MMArch {
391 let Inst{31-26} = 0x00;
392 let Inst{25-21} = 0x00;
393 let Inst{20-16} = rs;
394 let Inst{15-6} = funct;
395 let Inst{5-0} = 0x3c;
398 class MFLO_FM_MM<bits<10> funct> : MMArch {
403 let Inst{31-26} = 0x00;
404 let Inst{25-21} = 0x00;
405 let Inst{20-16} = rd;
406 let Inst{15-6} = funct;
407 let Inst{5-0} = 0x3c;
410 class CLO_FM_MM<bits<10> funct> : MMArch {
416 let Inst{31-26} = 0x00;
417 let Inst{25-21} = rd;
418 let Inst{20-16} = rs;
419 let Inst{15-6} = funct;
420 let Inst{5-0} = 0x3c;
423 class SEB_FM_MM<bits<10> funct> : MMArch {
429 let Inst{31-26} = 0x00;
430 let Inst{25-21} = rd;
431 let Inst{20-16} = rt;
432 let Inst{15-6} = funct;
433 let Inst{5-0} = 0x3c;
436 class EXT_FM_MM<bits<6> funct> : MMArch {
444 let Inst{31-26} = 0x00;
445 let Inst{25-21} = rt;
446 let Inst{20-16} = rs;
447 let Inst{15-11} = size;
448 let Inst{10-6} = pos;
449 let Inst{5-0} = funct;
452 class J_FM_MM<bits<6> op> : MMArch {
457 let Inst{31-26} = op;
458 let Inst{25-0} = target;
461 class JR_FM_MM<bits<8> funct> : MMArch {
466 let Inst{31-21} = 0x00;
467 let Inst{20-16} = rs;
468 let Inst{15-14} = 0x0;
469 let Inst{13-6} = funct;
470 let Inst{5-0} = 0x3c;
473 class JALR_FM_MM<bits<10> funct> {
479 let Inst{31-26} = 0x00;
480 let Inst{25-21} = rd;
481 let Inst{20-16} = rs;
482 let Inst{15-6} = funct;
483 let Inst{5-0} = 0x3c;
486 class BEQ_FM_MM<bits<6> op> : MMArch {
493 let Inst{31-26} = op;
494 let Inst{25-21} = rt;
495 let Inst{20-16} = rs;
496 let Inst{15-0} = offset;
499 class BGEZ_FM_MM<bits<5> funct> : MMArch {
505 let Inst{31-26} = 0x10;
506 let Inst{25-21} = funct;
507 let Inst{20-16} = rs;
508 let Inst{15-0} = offset;
511 class BGEZAL_FM_MM<bits<5> funct> : MMArch {
517 let Inst{31-26} = 0x10;
518 let Inst{25-21} = funct;
519 let Inst{20-16} = rs;
520 let Inst{15-0} = offset;
523 class SYNC_FM_MM : MMArch {
528 let Inst{31-26} = 0x00;
529 let Inst{25-21} = 0x0;
530 let Inst{20-16} = stype;
531 let Inst{15-6} = 0x1ad;
532 let Inst{5-0} = 0x3c;
535 class BRK_FM_MM : MMArch {
539 let Inst{31-26} = 0x0;
540 let Inst{25-16} = code_1;
541 let Inst{15-6} = code_2;
542 let Inst{5-0} = 0x07;
545 class SYS_FM_MM : MMArch {
548 let Inst{31-26} = 0x0;
549 let Inst{25-16} = code_;
550 let Inst{15-6} = 0x22d;
551 let Inst{5-0} = 0x3c;
558 let Inst{31-26} = 0x00;
559 let Inst{25-16} = code_;
560 let Inst{15-6} = 0x24d;
561 let Inst{5-0} = 0x3c;
564 class ER_FM_MM<bits<10> funct> : MMArch {
567 let Inst{31-26} = 0x00;
568 let Inst{25-16} = 0x00;
569 let Inst{15-6} = funct;
570 let Inst{5-0} = 0x3c;
573 class EI_FM_MM<bits<10> funct> : MMArch {
577 let Inst{31-26} = 0x00;
578 let Inst{25-21} = 0x00;
579 let Inst{20-16} = rt;
580 let Inst{15-6} = funct;
581 let Inst{5-0} = 0x3c;
584 class TEQ_FM_MM<bits<6> funct> : MMArch {
591 let Inst{31-26} = 0x00;
592 let Inst{25-21} = rt;
593 let Inst{20-16} = rs;
594 let Inst{15-12} = code_;
595 let Inst{11-6} = funct;
596 let Inst{5-0} = 0x3c;
599 class TEQI_FM_MM<bits<5> funct> : MMArch {
605 let Inst{31-26} = 0x10;
606 let Inst{25-21} = funct;
607 let Inst{20-16} = rs;
608 let Inst{15-0} = imm16;
611 class LL_FM_MM<bits<4> funct> {
617 let Inst{31-26} = 0x18;
618 let Inst{25-21} = rt;
619 let Inst{20-16} = addr{20-16};
620 let Inst{15-12} = funct;
621 let Inst{11-0} = addr{11-0};
624 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
631 let Inst{31-26} = 0x15;
632 let Inst{25-21} = ft;
633 let Inst{20-16} = fs;
634 let Inst{15-11} = fd;
637 let Inst{7-0} = funct;
639 list<dag> Pattern = [];
642 class LWXC1_FM_MM<bits<9> funct> : MMArch {
649 let Inst{31-26} = 0x15;
650 let Inst{25-21} = index;
651 let Inst{20-16} = base;
652 let Inst{15-11} = fd;
653 let Inst{10-9} = 0x0;
654 let Inst{8-0} = funct;
657 class SWXC1_FM_MM<bits<9> funct> : MMArch {
664 let Inst{31-26} = 0x15;
665 let Inst{25-21} = index;
666 let Inst{20-16} = base;
667 let Inst{15-11} = fs;
668 let Inst{10-9} = 0x0;
669 let Inst{8-0} = funct;
672 class CEQS_FM_MM<bits<2> fmt> : MMArch {
679 let Inst{31-26} = 0x15;
680 let Inst{25-21} = ft;
681 let Inst{20-16} = fs;
682 let Inst{15-13} = 0x0; // cc
684 let Inst{11-10} = fmt;
685 let Inst{9-6} = cond;
686 let Inst{5-0} = 0x3c;
689 class BC1F_FM_MM<bits<5> tf> : MMArch {
694 let Inst{31-26} = 0x10;
695 let Inst{25-21} = tf;
696 let Inst{20-18} = 0x0; // cc
697 let Inst{17-16} = 0x0;
698 let Inst{15-0} = offset;
701 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
707 let Inst{31-26} = 0x15;
708 let Inst{25-21} = fd;
709 let Inst{20-16} = fs;
712 let Inst{13-6} = funct;
713 let Inst{5-0} = 0x3b;
716 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
722 let Inst{31-26} = 0x15;
723 let Inst{25-21} = fd;
724 let Inst{20-16} = fs;
726 let Inst{14-13} = fmt;
727 let Inst{12-6} = funct;
728 let Inst{5-0} = 0x3b;
731 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
737 let Inst{31-26} = 0x15;
738 let Inst{25-21} = fd;
739 let Inst{20-16} = fs;
740 let Inst{15-13} = 0x0; //cc
741 let Inst{12-11} = 0x0;
742 let Inst{10-9} = fmt;
743 let Inst{8-0} = func;
746 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
753 let Inst{31-26} = 0x15;
754 let Inst{25-21} = rt;
755 let Inst{20-16} = fs;
756 let Inst{15-11} = fd;
758 let Inst{7-0} = funct;
761 class MFC1_FM_MM<bits<8> funct> : MMArch {
767 let Inst{31-26} = 0x15;
768 let Inst{25-21} = rt;
769 let Inst{20-16} = fs;
770 let Inst{15-14} = 0x0;
771 let Inst{13-6} = funct;
772 let Inst{5-0} = 0x3b;
775 class MADDS_FM_MM<bits<6> funct>: MMArch {
783 let Inst{31-26} = 0x15;
784 let Inst{25-21} = ft;
785 let Inst{20-16} = fs;
786 let Inst{15-11} = fd;
788 let Inst{5-0} = funct;
791 class COMPACT_BRANCH_FM_MM<bits<5> funct> {
797 let Inst{31-26} = 0x10;
798 let Inst{25-21} = funct;
799 let Inst{20-16} = rs;
800 let Inst{15-0} = offset;
803 class COP0_TLB_FM_MM<bits<10> op> : MMArch {
806 let Inst{31-26} = 0x0;
807 let Inst{25-16} = 0x0;
809 let Inst{5-0} = 0x3c;
812 class SDBBP_FM_MM : MMArch {
817 let Inst{31-26} = 0x0;
818 let Inst{25-16} = code_;
819 let Inst{15-6} = 0x36d;
820 let Inst{5-0} = 0x3c;
823 class RDHWR_FM_MM : MMArch {
829 let Inst{31-26} = 0x0;
830 let Inst{25-21} = rt;
831 let Inst{20-16} = rd;
832 let Inst{15-6} = 0x1ac;
833 let Inst{5-0} = 0x3c;
836 class LWXS_FM_MM<bits<10> funct> {
843 let Inst{31-26} = 0x0;
844 let Inst{25-21} = index;
845 let Inst{20-16} = base;
846 let Inst{15-11} = rd;
848 let Inst{9-0} = funct;
851 class LWM_FM_MM<bits<4> funct> : MMArch {
857 let Inst{31-26} = 0x8;
858 let Inst{25-21} = rt;
859 let Inst{20-16} = addr{20-16};
860 let Inst{15-12} = funct;
861 let Inst{11-0} = addr{11-0};
864 class LWM_FM_MM16<bits<4> funct> : MMArch {
870 let Inst{15-10} = 0x11;
871 let Inst{9-6} = funct;
873 let Inst{3-0} = addr;
876 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
879 bits<5> base = addr{20-16};
880 bits<12> offset = addr{11-0};
884 let Inst{31-26} = op;
885 let Inst{25-21} = hint;
886 let Inst{20-16} = base;
887 let Inst{15-12} = funct;
888 let Inst{11-0} = offset;
891 class BARRIER_FM_MM<bits<5> op> : MMArch {
894 let Inst{31-26} = 0x0;
895 let Inst{25-21} = 0x0;
896 let Inst{20-16} = 0x0;
897 let Inst{15-11} = op;
898 let Inst{10-6} = 0x0;