1 //===----------------------------------------------------------------------===//
2 // MicroMIPS Base Classes
3 //===----------------------------------------------------------------------===//
6 // Base class for MicroMips instructions.
7 // This class does not depend on the instruction size.
9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
10 InstrItinClass itin, Format f> : Instruction
12 let Namespace = "Mips";
13 let DecoderNamespace = "MicroMips";
15 let OutOperandList = outs;
16 let InOperandList = ins;
18 let AsmString = asmstr;
19 let Pattern = pattern;
22 let Predicates = [InMicroMips];
28 // Base class for MicroMIPS 16-bit instructions.
30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
31 InstrItinClass itin, Format f> :
32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
36 field bits<16> SoftFail = 0;
40 //===----------------------------------------------------------------------===//
41 // MicroMIPS 16-bit Instruction Formats
42 //===----------------------------------------------------------------------===//
44 class ARITH_FM_MM16<bit funct> {
51 let Inst{15-10} = 0x01;
58 class ANDI_FM_MM16<bits<6> funct> {
65 let Inst{15-10} = funct;
71 class LOGIC_FM_MM16<bits<4> funct> {
77 let Inst{15-10} = 0x11;
78 let Inst{9-6} = funct;
83 class SHIFT_FM_MM16<bits<1> funct> {
90 let Inst{15-10} = 0x09;
93 let Inst{3-1} = shamt;
97 class ADDIUR2_FM_MM16 {
104 let Inst{15-10} = 0x1b;
111 class LOAD_STORE_FM_MM16<bits<6> op> {
117 let Inst{15-10} = op;
119 let Inst{6-4} = addr{6-4};
120 let Inst{3-0} = addr{3-0};
123 class LOAD_STORE_SP_FM_MM16<bits<6> op> {
129 let Inst{15-10} = op;
131 let Inst{4-0} = offset;
134 class LOAD_GP_FM_MM16<bits<6> op> {
140 let Inst{15-10} = op;
142 let Inst{6-0} = offset;
145 class ADDIUS5_FM_MM16 {
151 let Inst{15-10} = 0x13;
157 class ADDIUSP_FM_MM16 {
162 let Inst{15-10} = 0x13;
167 class MOVE_FM_MM16<bits<6> funct> {
173 let Inst{15-10} = funct;
184 let Inst{15-10} = 0x3b;
189 class JALR_FM_MM16<bits<5> op> {
194 let Inst{15-10} = 0x11;
199 class MFHILO_FM_MM16<bits<5> funct> {
204 let Inst{15-10} = 0x11;
205 let Inst{9-5} = funct;
209 class JRADDIUSP_FM_MM16<bits<5> op> {
215 let Inst{15-10} = 0x11;
220 class ADDIUR1SP_FM_MM16 {
226 let Inst{15-10} = 0x1b;
232 class BRKSDBBP16_FM_MM<bits<6> op> {
236 let Inst{15-10} = 0x11;
238 let Inst{3-0} = code_;
241 class BEQNEZ_FM_MM16<bits<6> op> {
247 let Inst{15-10} = op;
249 let Inst{6-0} = offset;
257 let Inst{15-10} = 0x33;
258 let Inst{9-0} = offset;
261 class MOVEP_FM_MM16 {
268 let Inst{15-10} = 0x21;
269 let Inst{9-7} = dst_regs;
275 //===----------------------------------------------------------------------===//
276 // MicroMIPS 32-bit Instruction Formats
277 //===----------------------------------------------------------------------===//
280 string Arch = "micromips";
281 list<dag> Pattern = [];
284 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
291 let Inst{31-26} = op;
292 let Inst{25-21} = rt;
293 let Inst{20-16} = rs;
294 let Inst{15-11} = rd;
296 let Inst{9-0} = funct;
299 class ADDI_FM_MM<bits<6> op> : MMArch {
306 let Inst{31-26} = op;
307 let Inst{25-21} = rt;
308 let Inst{20-16} = rs;
309 let Inst{15-0} = imm16;
312 class SLTI_FM_MM<bits<6> op> : MMArch {
319 let Inst{31-26} = op;
320 let Inst{25-21} = rt;
321 let Inst{20-16} = rs;
322 let Inst{15-0} = imm16;
325 class LUI_FM_MM : MMArch {
331 let Inst{31-26} = 0x10;
332 let Inst{25-21} = 0xd;
333 let Inst{20-16} = rt;
334 let Inst{15-0} = imm16;
337 class MULT_FM_MM<bits<10> funct> : MMArch {
343 let Inst{31-26} = 0x00;
344 let Inst{25-21} = rt;
345 let Inst{20-16} = rs;
346 let Inst{15-6} = funct;
347 let Inst{5-0} = 0x3c;
350 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
358 let Inst{25-21} = rd;
359 let Inst{20-16} = rt;
360 let Inst{15-11} = shamt;
361 let Inst{10} = rotate;
362 let Inst{9-0} = funct;
365 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
373 let Inst{25-21} = rt;
374 let Inst{20-16} = rs;
375 let Inst{15-11} = rd;
376 let Inst{10} = rotate;
377 let Inst{9-0} = funct;
380 class LW_FM_MM<bits<6> op> : MMArch {
386 let Inst{31-26} = op;
387 let Inst{25-21} = rt;
388 let Inst{20-16} = addr{20-16};
389 let Inst{15-0} = addr{15-0};
392 class LWL_FM_MM<bits<4> funct> {
398 let Inst{31-26} = 0x18;
399 let Inst{25-21} = rt;
400 let Inst{20-16} = addr{20-16};
401 let Inst{15-12} = funct;
402 let Inst{11-0} = addr{11-0};
405 class CMov_F_I_FM_MM<bits<7> func> : MMArch {
412 let Inst{31-26} = 0x15;
413 let Inst{25-21} = rd;
414 let Inst{20-16} = rs;
415 let Inst{15-13} = fcc;
416 let Inst{12-6} = func;
417 let Inst{5-0} = 0x3b;
420 class MTLO_FM_MM<bits<10> funct> : MMArch {
425 let Inst{31-26} = 0x00;
426 let Inst{25-21} = 0x00;
427 let Inst{20-16} = rs;
428 let Inst{15-6} = funct;
429 let Inst{5-0} = 0x3c;
432 class MFLO_FM_MM<bits<10> funct> : MMArch {
437 let Inst{31-26} = 0x00;
438 let Inst{25-21} = 0x00;
439 let Inst{20-16} = rd;
440 let Inst{15-6} = funct;
441 let Inst{5-0} = 0x3c;
444 class CLO_FM_MM<bits<10> funct> : MMArch {
450 let Inst{31-26} = 0x00;
451 let Inst{25-21} = rd;
452 let Inst{20-16} = rs;
453 let Inst{15-6} = funct;
454 let Inst{5-0} = 0x3c;
457 class SEB_FM_MM<bits<10> funct> : MMArch {
463 let Inst{31-26} = 0x00;
464 let Inst{25-21} = rd;
465 let Inst{20-16} = rt;
466 let Inst{15-6} = funct;
467 let Inst{5-0} = 0x3c;
470 class EXT_FM_MM<bits<6> funct> : MMArch {
478 let Inst{31-26} = 0x00;
479 let Inst{25-21} = rt;
480 let Inst{20-16} = rs;
481 let Inst{15-11} = size;
482 let Inst{10-6} = pos;
483 let Inst{5-0} = funct;
486 class J_FM_MM<bits<6> op> : MMArch {
491 let Inst{31-26} = op;
492 let Inst{25-0} = target;
495 class JR_FM_MM<bits<8> funct> : MMArch {
500 let Inst{31-21} = 0x00;
501 let Inst{20-16} = rs;
502 let Inst{15-14} = 0x0;
503 let Inst{13-6} = funct;
504 let Inst{5-0} = 0x3c;
507 class JALR_FM_MM<bits<10> funct> {
513 let Inst{31-26} = 0x00;
514 let Inst{25-21} = rd;
515 let Inst{20-16} = rs;
516 let Inst{15-6} = funct;
517 let Inst{5-0} = 0x3c;
520 class BEQ_FM_MM<bits<6> op> : MMArch {
527 let Inst{31-26} = op;
528 let Inst{25-21} = rt;
529 let Inst{20-16} = rs;
530 let Inst{15-0} = offset;
533 class BGEZ_FM_MM<bits<5> funct> : MMArch {
539 let Inst{31-26} = 0x10;
540 let Inst{25-21} = funct;
541 let Inst{20-16} = rs;
542 let Inst{15-0} = offset;
545 class BGEZAL_FM_MM<bits<5> funct> : MMArch {
551 let Inst{31-26} = 0x10;
552 let Inst{25-21} = funct;
553 let Inst{20-16} = rs;
554 let Inst{15-0} = offset;
557 class SYNC_FM_MM : MMArch {
562 let Inst{31-26} = 0x00;
563 let Inst{25-21} = 0x0;
564 let Inst{20-16} = stype;
565 let Inst{15-6} = 0x1ad;
566 let Inst{5-0} = 0x3c;
569 class BRK_FM_MM : MMArch {
573 let Inst{31-26} = 0x0;
574 let Inst{25-16} = code_1;
575 let Inst{15-6} = code_2;
576 let Inst{5-0} = 0x07;
579 class SYS_FM_MM : MMArch {
582 let Inst{31-26} = 0x0;
583 let Inst{25-16} = code_;
584 let Inst{15-6} = 0x22d;
585 let Inst{5-0} = 0x3c;
592 let Inst{31-26} = 0x00;
593 let Inst{25-16} = code_;
594 let Inst{15-6} = 0x24d;
595 let Inst{5-0} = 0x3c;
598 class ER_FM_MM<bits<10> funct> : MMArch {
601 let Inst{31-26} = 0x00;
602 let Inst{25-16} = 0x00;
603 let Inst{15-6} = funct;
604 let Inst{5-0} = 0x3c;
607 class EI_FM_MM<bits<10> funct> : MMArch {
611 let Inst{31-26} = 0x00;
612 let Inst{25-21} = 0x00;
613 let Inst{20-16} = rt;
614 let Inst{15-6} = funct;
615 let Inst{5-0} = 0x3c;
618 class TEQ_FM_MM<bits<6> funct> : MMArch {
625 let Inst{31-26} = 0x00;
626 let Inst{25-21} = rt;
627 let Inst{20-16} = rs;
628 let Inst{15-12} = code_;
629 let Inst{11-6} = funct;
630 let Inst{5-0} = 0x3c;
633 class TEQI_FM_MM<bits<5> funct> : MMArch {
639 let Inst{31-26} = 0x10;
640 let Inst{25-21} = funct;
641 let Inst{20-16} = rs;
642 let Inst{15-0} = imm16;
645 class LL_FM_MM<bits<4> funct> {
651 let Inst{31-26} = 0x18;
652 let Inst{25-21} = rt;
653 let Inst{20-16} = addr{20-16};
654 let Inst{15-12} = funct;
655 let Inst{11-0} = addr{11-0};
658 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
665 let Inst{31-26} = 0x15;
666 let Inst{25-21} = ft;
667 let Inst{20-16} = fs;
668 let Inst{15-11} = fd;
671 let Inst{7-0} = funct;
673 list<dag> Pattern = [];
676 class LWXC1_FM_MM<bits<9> funct> : MMArch {
683 let Inst{31-26} = 0x15;
684 let Inst{25-21} = index;
685 let Inst{20-16} = base;
686 let Inst{15-11} = fd;
687 let Inst{10-9} = 0x0;
688 let Inst{8-0} = funct;
691 class SWXC1_FM_MM<bits<9> funct> : MMArch {
698 let Inst{31-26} = 0x15;
699 let Inst{25-21} = index;
700 let Inst{20-16} = base;
701 let Inst{15-11} = fs;
702 let Inst{10-9} = 0x0;
703 let Inst{8-0} = funct;
706 class CEQS_FM_MM<bits<2> fmt> : MMArch {
713 let Inst{31-26} = 0x15;
714 let Inst{25-21} = ft;
715 let Inst{20-16} = fs;
716 let Inst{15-13} = 0x0; // cc
718 let Inst{11-10} = fmt;
719 let Inst{9-6} = cond;
720 let Inst{5-0} = 0x3c;
723 class BC1F_FM_MM<bits<5> tf> : MMArch {
728 let Inst{31-26} = 0x10;
729 let Inst{25-21} = tf;
730 let Inst{20-18} = 0x0; // cc
731 let Inst{17-16} = 0x0;
732 let Inst{15-0} = offset;
735 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
741 let Inst{31-26} = 0x15;
742 let Inst{25-21} = fd;
743 let Inst{20-16} = fs;
746 let Inst{13-6} = funct;
747 let Inst{5-0} = 0x3b;
750 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
756 let Inst{31-26} = 0x15;
757 let Inst{25-21} = fd;
758 let Inst{20-16} = fs;
760 let Inst{14-13} = fmt;
761 let Inst{12-6} = funct;
762 let Inst{5-0} = 0x3b;
765 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
771 let Inst{31-26} = 0x15;
772 let Inst{25-21} = fd;
773 let Inst{20-16} = fs;
774 let Inst{15-13} = 0x0; //cc
775 let Inst{12-11} = 0x0;
776 let Inst{10-9} = fmt;
777 let Inst{8-0} = func;
780 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
787 let Inst{31-26} = 0x15;
788 let Inst{25-21} = rt;
789 let Inst{20-16} = fs;
790 let Inst{15-11} = fd;
792 let Inst{7-0} = funct;
795 class MFC1_FM_MM<bits<8> funct> : MMArch {
801 let Inst{31-26} = 0x15;
802 let Inst{25-21} = rt;
803 let Inst{20-16} = fs;
804 let Inst{15-14} = 0x0;
805 let Inst{13-6} = funct;
806 let Inst{5-0} = 0x3b;
809 class MADDS_FM_MM<bits<6> funct>: MMArch {
817 let Inst{31-26} = 0x15;
818 let Inst{25-21} = ft;
819 let Inst{20-16} = fs;
820 let Inst{15-11} = fd;
822 let Inst{5-0} = funct;
825 class COMPACT_BRANCH_FM_MM<bits<5> funct> {
831 let Inst{31-26} = 0x10;
832 let Inst{25-21} = funct;
833 let Inst{20-16} = rs;
834 let Inst{15-0} = offset;
837 class COP0_TLB_FM_MM<bits<10> op> : MMArch {
840 let Inst{31-26} = 0x0;
841 let Inst{25-16} = 0x0;
843 let Inst{5-0} = 0x3c;
846 class SDBBP_FM_MM : MMArch {
851 let Inst{31-26} = 0x0;
852 let Inst{25-16} = code_;
853 let Inst{15-6} = 0x36d;
854 let Inst{5-0} = 0x3c;
857 class RDHWR_FM_MM : MMArch {
863 let Inst{31-26} = 0x0;
864 let Inst{25-21} = rt;
865 let Inst{20-16} = rd;
866 let Inst{15-6} = 0x1ac;
867 let Inst{5-0} = 0x3c;
870 class LWXS_FM_MM<bits<10> funct> {
877 let Inst{31-26} = 0x0;
878 let Inst{25-21} = index;
879 let Inst{20-16} = base;
880 let Inst{15-11} = rd;
882 let Inst{9-0} = funct;
885 class LWM_FM_MM<bits<4> funct> : MMArch {
891 let Inst{31-26} = 0x8;
892 let Inst{25-21} = rt;
893 let Inst{20-16} = addr{20-16};
894 let Inst{15-12} = funct;
895 let Inst{11-0} = addr{11-0};
898 class LWM_FM_MM16<bits<4> funct> : MMArch {
904 let Inst{15-10} = 0x11;
905 let Inst{9-6} = funct;
907 let Inst{3-0} = addr;
910 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
913 bits<5> base = addr{20-16};
914 bits<12> offset = addr{11-0};
918 let Inst{31-26} = op;
919 let Inst{25-21} = hint;
920 let Inst{20-16} = base;
921 let Inst{15-12} = funct;
922 let Inst{11-0} = offset;
925 class BARRIER_FM_MM<bits<5> op> : MMArch {
928 let Inst{31-26} = 0x0;
929 let Inst{25-21} = 0x0;
930 let Inst{20-16} = 0x0;
931 let Inst{15-11} = op;
932 let Inst{10-6} = 0x0;
936 class ADDIUPC_FM_MM {
942 let Inst{31-26} = 0x1e;
943 let Inst{25-23} = rs;
944 let Inst{22-0} = imm;