1 //===----------------------------------------------------------------------===//
2 // MicroMIPS Base Classes
3 //===----------------------------------------------------------------------===//
6 // Base class for MicroMips instructions.
7 // This class does not depend on the instruction size.
9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
10 InstrItinClass itin, Format f> : Instruction
12 let Namespace = "Mips";
13 let DecoderNamespace = "MicroMips";
15 let OutOperandList = outs;
16 let InOperandList = ins;
18 let AsmString = asmstr;
19 let Pattern = pattern;
22 let Predicates = [InMicroMips];
28 // Base class for MicroMIPS 16-bit instructions.
30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
31 InstrItinClass itin, Format f> :
32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
36 field bits<16> SoftFail = 0;
40 //===----------------------------------------------------------------------===//
41 // MicroMIPS 16-bit Instruction Formats
42 //===----------------------------------------------------------------------===//
44 class ARITH_FM_MM16<bit funct> {
51 let Inst{15-10} = 0x01;
58 class ANDI_FM_MM16<bits<6> funct> {
65 let Inst{15-10} = funct;
71 class LOGIC_FM_MM16<bits<4> funct> {
77 let Inst{15-10} = 0x11;
78 let Inst{9-6} = funct;
83 class SHIFT_FM_MM16<bits<1> funct> {
90 let Inst{15-10} = 0x09;
93 let Inst{3-1} = shamt;
97 class ADDIUR2_FM_MM16 {
104 let Inst{15-10} = 0x1b;
111 class LOAD_STORE_FM_MM16<bits<6> op> {
117 let Inst{15-10} = op;
119 let Inst{6-4} = addr{6-4};
120 let Inst{3-0} = addr{3-0};
123 class LOAD_STORE_SP_FM_MM16<bits<6> op> {
129 let Inst{15-10} = op;
131 let Inst{4-0} = offset;
134 class ADDIUS5_FM_MM16 {
140 let Inst{15-10} = 0x13;
146 class ADDIUSP_FM_MM16 {
151 let Inst{15-10} = 0x13;
156 class MOVE_FM_MM16<bits<6> funct> {
162 let Inst{15-10} = funct;
173 let Inst{15-10} = 0x3b;
178 class JALR_FM_MM16<bits<5> op> {
183 let Inst{15-10} = 0x11;
188 class MFHILO_FM_MM16<bits<5> funct> {
193 let Inst{15-10} = 0x11;
194 let Inst{9-5} = funct;
198 class JRADDIUSP_FM_MM16<bits<5> op> {
204 let Inst{15-10} = 0x11;
209 class ADDIUR1SP_FM_MM16 {
215 let Inst{15-10} = 0x1b;
221 class BRKSDBBP16_FM_MM<bits<6> op> {
225 let Inst{15-10} = 0x11;
227 let Inst{3-0} = code_;
230 //===----------------------------------------------------------------------===//
231 // MicroMIPS 32-bit Instruction Formats
232 //===----------------------------------------------------------------------===//
235 string Arch = "micromips";
236 list<dag> Pattern = [];
239 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
246 let Inst{31-26} = op;
247 let Inst{25-21} = rt;
248 let Inst{20-16} = rs;
249 let Inst{15-11} = rd;
251 let Inst{9-0} = funct;
254 class ADDI_FM_MM<bits<6> op> : MMArch {
261 let Inst{31-26} = op;
262 let Inst{25-21} = rt;
263 let Inst{20-16} = rs;
264 let Inst{15-0} = imm16;
267 class SLTI_FM_MM<bits<6> op> : MMArch {
274 let Inst{31-26} = op;
275 let Inst{25-21} = rt;
276 let Inst{20-16} = rs;
277 let Inst{15-0} = imm16;
280 class LUI_FM_MM : MMArch {
286 let Inst{31-26} = 0x10;
287 let Inst{25-21} = 0xd;
288 let Inst{20-16} = rt;
289 let Inst{15-0} = imm16;
292 class MULT_FM_MM<bits<10> funct> : MMArch {
298 let Inst{31-26} = 0x00;
299 let Inst{25-21} = rt;
300 let Inst{20-16} = rs;
301 let Inst{15-6} = funct;
302 let Inst{5-0} = 0x3c;
305 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
313 let Inst{25-21} = rd;
314 let Inst{20-16} = rt;
315 let Inst{15-11} = shamt;
316 let Inst{10} = rotate;
317 let Inst{9-0} = funct;
320 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
328 let Inst{25-21} = rt;
329 let Inst{20-16} = rs;
330 let Inst{15-11} = rd;
331 let Inst{10} = rotate;
332 let Inst{9-0} = funct;
335 class LW_FM_MM<bits<6> op> : MMArch {
341 let Inst{31-26} = op;
342 let Inst{25-21} = rt;
343 let Inst{20-16} = addr{20-16};
344 let Inst{15-0} = addr{15-0};
347 class LWL_FM_MM<bits<4> funct> {
353 let Inst{31-26} = 0x18;
354 let Inst{25-21} = rt;
355 let Inst{20-16} = addr{20-16};
356 let Inst{15-12} = funct;
357 let Inst{11-0} = addr{11-0};
360 class CMov_F_I_FM_MM<bits<7> func> : MMArch {
367 let Inst{31-26} = 0x15;
368 let Inst{25-21} = rd;
369 let Inst{20-16} = rs;
370 let Inst{15-13} = fcc;
371 let Inst{12-6} = func;
372 let Inst{5-0} = 0x3b;
375 class MTLO_FM_MM<bits<10> funct> : MMArch {
380 let Inst{31-26} = 0x00;
381 let Inst{25-21} = 0x00;
382 let Inst{20-16} = rs;
383 let Inst{15-6} = funct;
384 let Inst{5-0} = 0x3c;
387 class MFLO_FM_MM<bits<10> funct> : MMArch {
392 let Inst{31-26} = 0x00;
393 let Inst{25-21} = 0x00;
394 let Inst{20-16} = rd;
395 let Inst{15-6} = funct;
396 let Inst{5-0} = 0x3c;
399 class CLO_FM_MM<bits<10> funct> : MMArch {
405 let Inst{31-26} = 0x00;
406 let Inst{25-21} = rd;
407 let Inst{20-16} = rs;
408 let Inst{15-6} = funct;
409 let Inst{5-0} = 0x3c;
412 class SEB_FM_MM<bits<10> funct> : MMArch {
418 let Inst{31-26} = 0x00;
419 let Inst{25-21} = rd;
420 let Inst{20-16} = rt;
421 let Inst{15-6} = funct;
422 let Inst{5-0} = 0x3c;
425 class EXT_FM_MM<bits<6> funct> : MMArch {
433 let Inst{31-26} = 0x00;
434 let Inst{25-21} = rt;
435 let Inst{20-16} = rs;
436 let Inst{15-11} = size;
437 let Inst{10-6} = pos;
438 let Inst{5-0} = funct;
441 class J_FM_MM<bits<6> op> : MMArch {
446 let Inst{31-26} = op;
447 let Inst{25-0} = target;
450 class JR_FM_MM<bits<8> funct> : MMArch {
455 let Inst{31-21} = 0x00;
456 let Inst{20-16} = rs;
457 let Inst{15-14} = 0x0;
458 let Inst{13-6} = funct;
459 let Inst{5-0} = 0x3c;
462 class JALR_FM_MM<bits<10> funct> {
468 let Inst{31-26} = 0x00;
469 let Inst{25-21} = rd;
470 let Inst{20-16} = rs;
471 let Inst{15-6} = funct;
472 let Inst{5-0} = 0x3c;
475 class BEQ_FM_MM<bits<6> op> : MMArch {
482 let Inst{31-26} = op;
483 let Inst{25-21} = rt;
484 let Inst{20-16} = rs;
485 let Inst{15-0} = offset;
488 class BGEZ_FM_MM<bits<5> funct> : MMArch {
494 let Inst{31-26} = 0x10;
495 let Inst{25-21} = funct;
496 let Inst{20-16} = rs;
497 let Inst{15-0} = offset;
500 class BGEZAL_FM_MM<bits<5> funct> : MMArch {
506 let Inst{31-26} = 0x10;
507 let Inst{25-21} = funct;
508 let Inst{20-16} = rs;
509 let Inst{15-0} = offset;
512 class SYNC_FM_MM : MMArch {
517 let Inst{31-26} = 0x00;
518 let Inst{25-21} = 0x0;
519 let Inst{20-16} = stype;
520 let Inst{15-6} = 0x1ad;
521 let Inst{5-0} = 0x3c;
524 class BRK_FM_MM : MMArch {
528 let Inst{31-26} = 0x0;
529 let Inst{25-16} = code_1;
530 let Inst{15-6} = code_2;
531 let Inst{5-0} = 0x07;
534 class SYS_FM_MM : MMArch {
537 let Inst{31-26} = 0x0;
538 let Inst{25-16} = code_;
539 let Inst{15-6} = 0x22d;
540 let Inst{5-0} = 0x3c;
547 let Inst{31-26} = 0x00;
548 let Inst{25-16} = code_;
549 let Inst{15-6} = 0x24d;
550 let Inst{5-0} = 0x3c;
553 class ER_FM_MM<bits<10> funct> : MMArch {
556 let Inst{31-26} = 0x00;
557 let Inst{25-16} = 0x00;
558 let Inst{15-6} = funct;
559 let Inst{5-0} = 0x3c;
562 class EI_FM_MM<bits<10> funct> : MMArch {
566 let Inst{31-26} = 0x00;
567 let Inst{25-21} = 0x00;
568 let Inst{20-16} = rt;
569 let Inst{15-6} = funct;
570 let Inst{5-0} = 0x3c;
573 class TEQ_FM_MM<bits<6> funct> : MMArch {
580 let Inst{31-26} = 0x00;
581 let Inst{25-21} = rt;
582 let Inst{20-16} = rs;
583 let Inst{15-12} = code_;
584 let Inst{11-6} = funct;
585 let Inst{5-0} = 0x3c;
588 class TEQI_FM_MM<bits<5> funct> : MMArch {
594 let Inst{31-26} = 0x10;
595 let Inst{25-21} = funct;
596 let Inst{20-16} = rs;
597 let Inst{15-0} = imm16;
600 class LL_FM_MM<bits<4> funct> {
606 let Inst{31-26} = 0x18;
607 let Inst{25-21} = rt;
608 let Inst{20-16} = addr{20-16};
609 let Inst{15-12} = funct;
610 let Inst{11-0} = addr{11-0};
613 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
620 let Inst{31-26} = 0x15;
621 let Inst{25-21} = ft;
622 let Inst{20-16} = fs;
623 let Inst{15-11} = fd;
626 let Inst{7-0} = funct;
628 list<dag> Pattern = [];
631 class LWXC1_FM_MM<bits<9> funct> : MMArch {
638 let Inst{31-26} = 0x15;
639 let Inst{25-21} = index;
640 let Inst{20-16} = base;
641 let Inst{15-11} = fd;
642 let Inst{10-9} = 0x0;
643 let Inst{8-0} = funct;
646 class SWXC1_FM_MM<bits<9> funct> : MMArch {
653 let Inst{31-26} = 0x15;
654 let Inst{25-21} = index;
655 let Inst{20-16} = base;
656 let Inst{15-11} = fs;
657 let Inst{10-9} = 0x0;
658 let Inst{8-0} = funct;
661 class CEQS_FM_MM<bits<2> fmt> : MMArch {
668 let Inst{31-26} = 0x15;
669 let Inst{25-21} = ft;
670 let Inst{20-16} = fs;
671 let Inst{15-13} = 0x0; // cc
673 let Inst{11-10} = fmt;
674 let Inst{9-6} = cond;
675 let Inst{5-0} = 0x3c;
678 class BC1F_FM_MM<bits<5> tf> : MMArch {
683 let Inst{31-26} = 0x10;
684 let Inst{25-21} = tf;
685 let Inst{20-18} = 0x0; // cc
686 let Inst{17-16} = 0x0;
687 let Inst{15-0} = offset;
690 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
696 let Inst{31-26} = 0x15;
697 let Inst{25-21} = fd;
698 let Inst{20-16} = fs;
701 let Inst{13-6} = funct;
702 let Inst{5-0} = 0x3b;
705 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
711 let Inst{31-26} = 0x15;
712 let Inst{25-21} = fd;
713 let Inst{20-16} = fs;
715 let Inst{14-13} = fmt;
716 let Inst{12-6} = funct;
717 let Inst{5-0} = 0x3b;
720 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
726 let Inst{31-26} = 0x15;
727 let Inst{25-21} = fd;
728 let Inst{20-16} = fs;
729 let Inst{15-13} = 0x0; //cc
730 let Inst{12-11} = 0x0;
731 let Inst{10-9} = fmt;
732 let Inst{8-0} = func;
735 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
742 let Inst{31-26} = 0x15;
743 let Inst{25-21} = rt;
744 let Inst{20-16} = fs;
745 let Inst{15-11} = fd;
747 let Inst{7-0} = funct;
750 class MFC1_FM_MM<bits<8> funct> : MMArch {
756 let Inst{31-26} = 0x15;
757 let Inst{25-21} = rt;
758 let Inst{20-16} = fs;
759 let Inst{15-14} = 0x0;
760 let Inst{13-6} = funct;
761 let Inst{5-0} = 0x3b;
764 class MADDS_FM_MM<bits<6> funct>: MMArch {
772 let Inst{31-26} = 0x15;
773 let Inst{25-21} = ft;
774 let Inst{20-16} = fs;
775 let Inst{15-11} = fd;
777 let Inst{5-0} = funct;
780 class COMPACT_BRANCH_FM_MM<bits<5> funct> {
786 let Inst{31-26} = 0x10;
787 let Inst{25-21} = funct;
788 let Inst{20-16} = rs;
789 let Inst{15-0} = offset;
792 class COP0_TLB_FM_MM<bits<10> op> : MMArch {
795 let Inst{31-26} = 0x0;
796 let Inst{25-16} = 0x0;
798 let Inst{5-0} = 0x3c;
801 class SDBBP_FM_MM : MMArch {
806 let Inst{31-26} = 0x0;
807 let Inst{25-16} = code_;
808 let Inst{15-6} = 0x36d;
809 let Inst{5-0} = 0x3c;
812 class RDHWR_FM_MM : MMArch {
818 let Inst{31-26} = 0x0;
819 let Inst{25-21} = rt;
820 let Inst{20-16} = rd;
821 let Inst{15-6} = 0x1ac;
822 let Inst{5-0} = 0x3c;
825 class LWXS_FM_MM<bits<10> funct> {
832 let Inst{31-26} = 0x0;
833 let Inst{25-21} = index;
834 let Inst{20-16} = base;
835 let Inst{15-11} = rd;
837 let Inst{9-0} = funct;
840 class LWM_FM_MM<bits<4> funct> : MMArch {
846 let Inst{31-26} = 0x8;
847 let Inst{25-21} = rt;
848 let Inst{20-16} = addr{20-16};
849 let Inst{15-12} = funct;
850 let Inst{11-0} = addr{11-0};
853 class LWM_FM_MM16<bits<4> funct> : MMArch {
859 let Inst{15-10} = 0x11;
860 let Inst{9-6} = funct;
862 let Inst{3-0} = addr;
865 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
868 bits<5> base = addr{20-16};
869 bits<12> offset = addr{11-0};
873 let Inst{31-26} = op;
874 let Inst{25-21} = hint;
875 let Inst{20-16} = base;
876 let Inst{15-12} = funct;
877 let Inst{11-0} = offset;
880 class BARRIER_FM_MM<bits<5> op> : MMArch {
883 let Inst{31-26} = 0x0;
884 let Inst{25-21} = 0x0;
885 let Inst{20-16} = 0x0;
886 let Inst{15-11} = op;
887 let Inst{10-6} = 0x0;