1 //===-- Mips16FrameLowering.cpp - Mips16 Frame Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips16 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "Mips16FrameLowering.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineModuleInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/IR/Function.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Target/TargetOptions.h"
30 void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
31 MachineBasicBlock &MBB = MF.front();
32 MachineFrameInfo *MFI = MF.getFrameInfo();
33 const Mips16InstrInfo &TII =
34 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
35 MachineBasicBlock::iterator MBBI = MBB.begin();
36 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
37 uint64_t StackSize = MFI->getStackSize();
39 // No need to allocate space on the stack.
40 if (StackSize == 0 && !MFI->adjustsStack()) return;
42 MachineModuleInfo &MMI = MF.getMMI();
43 const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo();
44 MachineLocation DstML, SrcML;
47 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
49 // emit ".cfi_def_cfa_offset StackSize"
50 MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
51 BuildMI(MBB, MBBI, dl,
52 TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
54 MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
56 MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
57 BuildMI(MBB, MBBI, dl,
58 TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
59 unsigned S1 = MRI.getDwarfRegNum(Mips::S1, true);
60 MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, -8));
62 unsigned S0 = MRI.getDwarfRegNum(Mips::S0, true);
63 MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, -12));
65 unsigned RA = MRI.getDwarfRegNum(Mips::RA, true);
66 MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, -4));
69 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
74 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
75 MachineBasicBlock &MBB) const {
76 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
77 MachineFrameInfo *MFI = MF.getFrameInfo();
78 const Mips16InstrInfo &TII =
79 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
80 DebugLoc dl = MBBI->getDebugLoc();
81 uint64_t StackSize = MFI->getStackSize();
87 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
91 // assumes stacksize multiple of 8
92 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
95 bool Mips16FrameLowering::
96 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
97 MachineBasicBlock::iterator MI,
98 const std::vector<CalleeSavedInfo> &CSI,
99 const TargetRegisterInfo *TRI) const {
100 MachineFunction *MF = MBB.getParent();
101 MachineBasicBlock *EntryBlock = MF->begin();
104 // Registers RA, S0,S1 are the callee saved registers and they
105 // will be saved with the "save" instruction
106 // during emitPrologue
108 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
109 // Add the callee-saved register as live-in. Do not add if the register is
110 // RA and return address is taken, because it has already been added in
111 // method MipsTargetLowering::LowerRETURNADDR.
112 // It's killed at the spill, unless the register is RA and return address
114 unsigned Reg = CSI[i].getReg();
115 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
116 && MF->getFrameInfo()->isReturnAddressTaken();
117 if (!IsRAAndRetAddrIsTaken)
118 EntryBlock->addLiveIn(Reg);
124 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
125 MachineBasicBlock::iterator MI,
126 const std::vector<CalleeSavedInfo> &CSI,
127 const TargetRegisterInfo *TRI) const {
129 // Registers RA,S0,S1 are the callee saved registers and they will be restored
130 // with the restore instruction during emitEpilogue.
131 // We need to override this virtual function, otherwise llvm will try and
132 // restore the registers on it's on from the stack.
138 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
139 void Mips16FrameLowering::
140 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
141 MachineBasicBlock::iterator I) const {
142 if (!hasReservedCallFrame(MF)) {
143 int64_t Amount = I->getOperand(0).getImm();
145 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
148 const Mips16InstrInfo &TII =
149 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
151 TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
158 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
159 const MachineFrameInfo *MFI = MF.getFrameInfo();
160 // Reserve call frame if the size of the maximum call frame fits into 15-bit
161 // immediate field and there are no variable sized objects on the stack.
162 return isInt<15>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects();
165 void Mips16FrameLowering::
166 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
167 RegScavenger *RS) const {
168 MF.getRegInfo().setPhysRegUsed(Mips::RA);
169 MF.getRegInfo().setPhysRegUsed(Mips::S0);
170 MF.getRegInfo().setPhysRegUsed(Mips::S1);
173 const MipsFrameLowering *
174 llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
175 return new Mips16FrameLowering(ST);